ARM: dts: omap5: Add bus_dma_limit for L3 bus
[linux/fpc-iii.git] / sound / soc / codecs / da7218.h
blob9ac2892092b59f7e2eeb7d99ece0d2ebdb5e0576
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3 * da7218.h - DA7218 ALSA SoC Codec Driver
5 * Copyright (c) 2015 Dialog Semiconductor
7 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
8 */
10 #ifndef _DA7218_H
11 #define _DA7218_H
13 #include <linux/regmap.h>
14 #include <linux/regulator/consumer.h>
15 #include <sound/da7218.h>
19 * Registers
21 #define DA7218_SYSTEM_ACTIVE 0x0
22 #define DA7218_CIF_CTRL 0x1
23 #define DA7218_CHIP_ID1 0x4
24 #define DA7218_CHIP_ID2 0x5
25 #define DA7218_CHIP_REVISION 0x6
26 #define DA7218_SPARE1 0x7
27 #define DA7218_STATUS1 0x8
28 #define DA7218_SOFT_RESET 0x9
29 #define DA7218_SR 0xB
30 #define DA7218_PC_COUNT 0xC
31 #define DA7218_GAIN_RAMP_CTRL 0xD
32 #define DA7218_CIF_TIMEOUT_CTRL 0x10
33 #define DA7218_SYSTEM_MODES_INPUT 0x14
34 #define DA7218_SYSTEM_MODES_OUTPUT 0x15
35 #define DA7218_SYSTEM_STATUS 0x16
36 #define DA7218_IN_1L_FILTER_CTRL 0x18
37 #define DA7218_IN_1R_FILTER_CTRL 0x19
38 #define DA7218_IN_2L_FILTER_CTRL 0x1A
39 #define DA7218_IN_2R_FILTER_CTRL 0x1B
40 #define DA7218_OUT_1L_FILTER_CTRL 0x20
41 #define DA7218_OUT_1R_FILTER_CTRL 0x21
42 #define DA7218_OUT_1_HPF_FILTER_CTRL 0x24
43 #define DA7218_OUT_1_EQ_12_FILTER_CTRL 0x25
44 #define DA7218_OUT_1_EQ_34_FILTER_CTRL 0x26
45 #define DA7218_OUT_1_EQ_5_FILTER_CTRL 0x27
46 #define DA7218_OUT_1_BIQ_5STAGE_CTRL 0x28
47 #define DA7218_OUT_1_BIQ_5STAGE_DATA 0x29
48 #define DA7218_OUT_1_BIQ_5STAGE_ADDR 0x2A
49 #define DA7218_MIXIN_1_CTRL 0x2C
50 #define DA7218_MIXIN_1_GAIN 0x2D
51 #define DA7218_MIXIN_2_CTRL 0x2E
52 #define DA7218_MIXIN_2_GAIN 0x2F
53 #define DA7218_ALC_CTRL1 0x30
54 #define DA7218_ALC_CTRL2 0x31
55 #define DA7218_ALC_CTRL3 0x32
56 #define DA7218_ALC_NOISE 0x33
57 #define DA7218_ALC_TARGET_MIN 0x34
58 #define DA7218_ALC_TARGET_MAX 0x35
59 #define DA7218_ALC_GAIN_LIMITS 0x36
60 #define DA7218_ALC_ANA_GAIN_LIMITS 0x37
61 #define DA7218_ALC_ANTICLIP_CTRL 0x38
62 #define DA7218_AGS_ENABLE 0x3C
63 #define DA7218_AGS_TRIGGER 0x3D
64 #define DA7218_AGS_ATT_MAX 0x3E
65 #define DA7218_AGS_TIMEOUT 0x3F
66 #define DA7218_AGS_ANTICLIP_CTRL 0x40
67 #define DA7218_CALIB_CTRL 0x44
68 #define DA7218_CALIB_OFFSET_AUTO_M_1 0x45
69 #define DA7218_CALIB_OFFSET_AUTO_U_1 0x46
70 #define DA7218_CALIB_OFFSET_AUTO_M_2 0x47
71 #define DA7218_CALIB_OFFSET_AUTO_U_2 0x48
72 #define DA7218_ENV_TRACK_CTRL 0x4C
73 #define DA7218_LVL_DET_CTRL 0x50
74 #define DA7218_LVL_DET_LEVEL 0x51
75 #define DA7218_DGS_TRIGGER 0x54
76 #define DA7218_DGS_ENABLE 0x55
77 #define DA7218_DGS_RISE_FALL 0x56
78 #define DA7218_DGS_SYNC_DELAY 0x57
79 #define DA7218_DGS_SYNC_DELAY2 0x58
80 #define DA7218_DGS_SYNC_DELAY3 0x59
81 #define DA7218_DGS_LEVELS 0x5A
82 #define DA7218_DGS_GAIN_CTRL 0x5B
83 #define DA7218_DROUTING_OUTDAI_1L 0x5C
84 #define DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN 0x5D
85 #define DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN 0x5E
86 #define DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN 0x5F
87 #define DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN 0x60
88 #define DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN 0x61
89 #define DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN 0x62
90 #define DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN 0x63
91 #define DA7218_DROUTING_OUTDAI_1R 0x64
92 #define DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN 0x65
93 #define DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN 0x66
94 #define DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN 0x67
95 #define DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN 0x68
96 #define DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN 0x69
97 #define DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN 0x6A
98 #define DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN 0x6B
99 #define DA7218_DROUTING_OUTFILT_1L 0x6C
100 #define DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN 0x6D
101 #define DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN 0x6E
102 #define DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN 0x6F
103 #define DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN 0x70
104 #define DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN 0x71
105 #define DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN 0x72
106 #define DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN 0x73
107 #define DA7218_DROUTING_OUTFILT_1R 0x74
108 #define DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN 0x75
109 #define DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN 0x76
110 #define DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN 0x77
111 #define DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN 0x78
112 #define DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN 0x79
113 #define DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN 0x7A
114 #define DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN 0x7B
115 #define DA7218_DROUTING_OUTDAI_2L 0x7C
116 #define DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN 0x7D
117 #define DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN 0x7E
118 #define DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN 0x7F
119 #define DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN 0x80
120 #define DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN 0x81
121 #define DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN 0x82
122 #define DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN 0x83
123 #define DA7218_DROUTING_OUTDAI_2R 0x84
124 #define DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN 0x85
125 #define DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN 0x86
126 #define DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN 0x87
127 #define DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN 0x88
128 #define DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN 0x89
129 #define DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN 0x8A
130 #define DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN 0x8B
131 #define DA7218_DAI_CTRL 0x8C
132 #define DA7218_DAI_TDM_CTRL 0x8D
133 #define DA7218_DAI_OFFSET_LOWER 0x8E
134 #define DA7218_DAI_OFFSET_UPPER 0x8F
135 #define DA7218_DAI_CLK_MODE 0x90
136 #define DA7218_PLL_CTRL 0x91
137 #define DA7218_PLL_FRAC_TOP 0x92
138 #define DA7218_PLL_FRAC_BOT 0x93
139 #define DA7218_PLL_INTEGER 0x94
140 #define DA7218_PLL_STATUS 0x95
141 #define DA7218_PLL_REFOSC_CAL 0x98
142 #define DA7218_DAC_NG_CTRL 0x9C
143 #define DA7218_DAC_NG_SETUP_TIME 0x9D
144 #define DA7218_DAC_NG_OFF_THRESH 0x9E
145 #define DA7218_DAC_NG_ON_THRESH 0x9F
146 #define DA7218_TONE_GEN_CFG1 0xA0
147 #define DA7218_TONE_GEN_CFG2 0xA1
148 #define DA7218_TONE_GEN_FREQ1_L 0xA2
149 #define DA7218_TONE_GEN_FREQ1_U 0xA3
150 #define DA7218_TONE_GEN_FREQ2_L 0xA4
151 #define DA7218_TONE_GEN_FREQ2_U 0xA5
152 #define DA7218_TONE_GEN_CYCLES 0xA6
153 #define DA7218_TONE_GEN_ON_PER 0xA7
154 #define DA7218_TONE_GEN_OFF_PER 0xA8
155 #define DA7218_CP_CTRL 0xAC
156 #define DA7218_CP_DELAY 0xAD
157 #define DA7218_CP_VOL_THRESHOLD1 0xAE
158 #define DA7218_MIC_1_CTRL 0xB4
159 #define DA7218_MIC_1_GAIN 0xB5
160 #define DA7218_MIC_1_SELECT 0xB7
161 #define DA7218_MIC_2_CTRL 0xB8
162 #define DA7218_MIC_2_GAIN 0xB9
163 #define DA7218_MIC_2_SELECT 0xBB
164 #define DA7218_IN_1_HPF_FILTER_CTRL 0xBC
165 #define DA7218_IN_2_HPF_FILTER_CTRL 0xBD
166 #define DA7218_ADC_1_CTRL 0xC0
167 #define DA7218_ADC_2_CTRL 0xC1
168 #define DA7218_ADC_MODE 0xC2
169 #define DA7218_MIXOUT_L_CTRL 0xCC
170 #define DA7218_MIXOUT_L_GAIN 0xCD
171 #define DA7218_MIXOUT_R_CTRL 0xCE
172 #define DA7218_MIXOUT_R_GAIN 0xCF
173 #define DA7218_HP_L_CTRL 0xD0
174 #define DA7218_HP_L_GAIN 0xD1
175 #define DA7218_HP_R_CTRL 0xD2
176 #define DA7218_HP_R_GAIN 0xD3
177 #define DA7218_HP_SNGL_CTRL 0xD4
178 #define DA7218_HP_DIFF_CTRL 0xD5
179 #define DA7218_HP_DIFF_UNLOCK 0xD7
180 #define DA7218_HPLDET_JACK 0xD8
181 #define DA7218_HPLDET_CTRL 0xD9
182 #define DA7218_HPLDET_TEST 0xDA
183 #define DA7218_REFERENCES 0xDC
184 #define DA7218_IO_CTRL 0xE0
185 #define DA7218_LDO_CTRL 0xE1
186 #define DA7218_SIDETONE_CTRL 0xE4
187 #define DA7218_SIDETONE_IN_SELECT 0xE5
188 #define DA7218_SIDETONE_GAIN 0xE6
189 #define DA7218_DROUTING_ST_OUTFILT_1L 0xE8
190 #define DA7218_DROUTING_ST_OUTFILT_1R 0xE9
191 #define DA7218_SIDETONE_BIQ_3STAGE_DATA 0xEA
192 #define DA7218_SIDETONE_BIQ_3STAGE_ADDR 0xEB
193 #define DA7218_EVENT_STATUS 0xEC
194 #define DA7218_EVENT 0xED
195 #define DA7218_EVENT_MASK 0xEE
196 #define DA7218_DMIC_1_CTRL 0xF0
197 #define DA7218_DMIC_2_CTRL 0xF1
198 #define DA7218_IN_1L_GAIN 0xF4
199 #define DA7218_IN_1R_GAIN 0xF5
200 #define DA7218_IN_2L_GAIN 0xF6
201 #define DA7218_IN_2R_GAIN 0xF7
202 #define DA7218_OUT_1L_GAIN 0xF8
203 #define DA7218_OUT_1R_GAIN 0xF9
204 #define DA7218_MICBIAS_CTRL 0xFC
205 #define DA7218_MICBIAS_EN 0xFD
209 * Bit Fields
212 #define DA7218_SWITCH_EN_MAX 0x1
214 /* DA7218_SYSTEM_ACTIVE = 0x0 */
215 #define DA7218_SYSTEM_ACTIVE_SHIFT 0
216 #define DA7218_SYSTEM_ACTIVE_MASK (0x1 << 0)
218 /* DA7218_CIF_CTRL = 0x1 */
219 #define DA7218_CIF_I2C_WRITE_MODE_SHIFT 0
220 #define DA7218_CIF_I2C_WRITE_MODE_MASK (0x1 << 0)
222 /* DA7218_CHIP_ID1 = 0x4 */
223 #define DA7218_CHIP_ID1_SHIFT 0
224 #define DA7218_CHIP_ID1_MASK (0xFF << 0)
226 /* DA7218_CHIP_ID2 = 0x5 */
227 #define DA7218_CHIP_ID2_SHIFT 0
228 #define DA7218_CHIP_ID2_MASK (0xFF << 0)
230 /* DA7218_CHIP_REVISION = 0x6 */
231 #define DA7218_CHIP_MINOR_SHIFT 0
232 #define DA7218_CHIP_MINOR_MASK (0xF << 0)
233 #define DA7218_CHIP_MAJOR_SHIFT 4
234 #define DA7218_CHIP_MAJOR_MASK (0xF << 4)
236 /* DA7218_SPARE1 = 0x7 */
237 #define DA7218_SPARE1_SHIFT 0
238 #define DA7218_SPARE1_MASK (0xFF << 0)
240 /* DA7218_STATUS1 = 0x8 */
241 #define DA7218_STATUS_SPARE1_SHIFT 0
242 #define DA7218_STATUS_SPARE1_MASK (0xFF << 0)
244 /* DA7218_SOFT_RESET = 0x9 */
245 #define DA7218_CIF_REG_SOFT_RESET_SHIFT 7
246 #define DA7218_CIF_REG_SOFT_RESET_MASK (0x1 << 7)
248 /* DA7218_SR = 0xB */
249 #define DA7218_SR_ADC_SHIFT 0
250 #define DA7218_SR_ADC_MASK (0xF << 0)
251 #define DA7218_SR_DAC_SHIFT 4
252 #define DA7218_SR_DAC_MASK (0xF << 4)
253 #define DA7218_SR_8000 0x01
254 #define DA7218_SR_11025 0x02
255 #define DA7218_SR_12000 0x03
256 #define DA7218_SR_16000 0x05
257 #define DA7218_SR_22050 0x06
258 #define DA7218_SR_24000 0x07
259 #define DA7218_SR_32000 0x09
260 #define DA7218_SR_44100 0x0A
261 #define DA7218_SR_48000 0x0B
262 #define DA7218_SR_88200 0x0E
263 #define DA7218_SR_96000 0x0F
265 /* DA7218_PC_COUNT = 0xC */
266 #define DA7218_PC_FREERUN_SHIFT 0
267 #define DA7218_PC_FREERUN_MASK (0x1 << 0)
268 #define DA7218_PC_RESYNC_AUTO_SHIFT 1
269 #define DA7218_PC_RESYNC_AUTO_MASK (0x1 << 1)
271 /* DA7218_GAIN_RAMP_CTRL = 0xD */
272 #define DA7218_GAIN_RAMP_RATE_SHIFT 0
273 #define DA7218_GAIN_RAMP_RATE_MASK (0x3 << 0)
274 #define DA7218_GAIN_RAMP_RATE_MAX 4
276 /* DA7218_CIF_TIMEOUT_CTRL = 0x10 */
277 #define DA7218_I2C_TIMEOUT_EN_SHIFT 0
278 #define DA7218_I2C_TIMEOUT_EN_MASK (0x1 << 0)
280 /* DA7218_SYSTEM_MODES_INPUT = 0x14 */
281 #define DA7218_MODE_SUBMIT_SHIFT 0
282 #define DA7218_MODE_SUBMIT_MASK (0x1 << 0)
283 #define DA7218_ADC_MODE_SHIFT 1
284 #define DA7218_ADC_MODE_MASK (0x7F << 1)
286 /* DA7218_SYSTEM_MODES_OUTPUT = 0x15 */
287 #define DA7218_MODE_SUBMIT_SHIFT 0
288 #define DA7218_MODE_SUBMIT_MASK (0x1 << 0)
289 #define DA7218_DAC_MODE_SHIFT 1
290 #define DA7218_DAC_MODE_MASK (0x7F << 1)
292 /* DA7218_SYSTEM_STATUS = 0x16 */
293 #define DA7218_SC1_BUSY_SHIFT 0
294 #define DA7218_SC1_BUSY_MASK (0x1 << 0)
295 #define DA7218_SC2_BUSY_SHIFT 1
296 #define DA7218_SC2_BUSY_MASK (0x1 << 1)
298 /* DA7218_IN_1L_FILTER_CTRL = 0x18 */
299 #define DA7218_IN_1L_RAMP_EN_SHIFT 5
300 #define DA7218_IN_1L_RAMP_EN_MASK (0x1 << 5)
301 #define DA7218_IN_1L_MUTE_EN_SHIFT 6
302 #define DA7218_IN_1L_MUTE_EN_MASK (0x1 << 6)
303 #define DA7218_IN_1L_FILTER_EN_SHIFT 7
304 #define DA7218_IN_1L_FILTER_EN_MASK (0x1 << 7)
306 /* DA7218_IN_1R_FILTER_CTRL = 0x19 */
307 #define DA7218_IN_1R_RAMP_EN_SHIFT 5
308 #define DA7218_IN_1R_RAMP_EN_MASK (0x1 << 5)
309 #define DA7218_IN_1R_MUTE_EN_SHIFT 6
310 #define DA7218_IN_1R_MUTE_EN_MASK (0x1 << 6)
311 #define DA7218_IN_1R_FILTER_EN_SHIFT 7
312 #define DA7218_IN_1R_FILTER_EN_MASK (0x1 << 7)
314 /* DA7218_IN_2L_FILTER_CTRL = 0x1A */
315 #define DA7218_IN_2L_RAMP_EN_SHIFT 5
316 #define DA7218_IN_2L_RAMP_EN_MASK (0x1 << 5)
317 #define DA7218_IN_2L_MUTE_EN_SHIFT 6
318 #define DA7218_IN_2L_MUTE_EN_MASK (0x1 << 6)
319 #define DA7218_IN_2L_FILTER_EN_SHIFT 7
320 #define DA7218_IN_2L_FILTER_EN_MASK (0x1 << 7)
322 /* DA7218_IN_2R_FILTER_CTRL = 0x1B */
323 #define DA7218_IN_2R_RAMP_EN_SHIFT 5
324 #define DA7218_IN_2R_RAMP_EN_MASK (0x1 << 5)
325 #define DA7218_IN_2R_MUTE_EN_SHIFT 6
326 #define DA7218_IN_2R_MUTE_EN_MASK (0x1 << 6)
327 #define DA7218_IN_2R_FILTER_EN_SHIFT 7
328 #define DA7218_IN_2R_FILTER_EN_MASK (0x1 << 7)
330 /* DA7218_OUT_1L_FILTER_CTRL = 0x20 */
331 #define DA7218_OUT_1L_BIQ_5STAGE_SEL_SHIFT 3
332 #define DA7218_OUT_1L_BIQ_5STAGE_SEL_MASK (0x1 << 3)
333 #define DA7218_OUT_BIQ_5STAGE_SEL_MAX 2
334 #define DA7218_OUT_1L_SUBRANGE_EN_SHIFT 4
335 #define DA7218_OUT_1L_SUBRANGE_EN_MASK (0x1 << 4)
336 #define DA7218_OUT_1L_RAMP_EN_SHIFT 5
337 #define DA7218_OUT_1L_RAMP_EN_MASK (0x1 << 5)
338 #define DA7218_OUT_1L_MUTE_EN_SHIFT 6
339 #define DA7218_OUT_1L_MUTE_EN_MASK (0x1 << 6)
340 #define DA7218_OUT_1L_FILTER_EN_SHIFT 7
341 #define DA7218_OUT_1L_FILTER_EN_MASK (0x1 << 7)
343 /* DA7218_OUT_1R_FILTER_CTRL = 0x21 */
344 #define DA7218_OUT_1R_BIQ_5STAGE_SEL_SHIFT 3
345 #define DA7218_OUT_1R_BIQ_5STAGE_SEL_MASK (0x1 << 3)
346 #define DA7218_OUT_1R_SUBRANGE_EN_SHIFT 4
347 #define DA7218_OUT_1R_SUBRANGE_EN_MASK (0x1 << 4)
348 #define DA7218_OUT_1R_RAMP_EN_SHIFT 5
349 #define DA7218_OUT_1R_RAMP_EN_MASK (0x1 << 5)
350 #define DA7218_OUT_1R_MUTE_EN_SHIFT 6
351 #define DA7218_OUT_1R_MUTE_EN_MASK (0x1 << 6)
352 #define DA7218_OUT_1R_FILTER_EN_SHIFT 7
353 #define DA7218_OUT_1R_FILTER_EN_MASK (0x1 << 7)
355 /* DA7218_OUT_1_HPF_FILTER_CTRL = 0x24 */
356 #define DA7218_OUT_1_VOICE_HPF_CORNER_SHIFT 0
357 #define DA7218_OUT_1_VOICE_HPF_CORNER_MASK (0x7 << 0)
358 #define DA7218_VOICE_HPF_CORNER_MAX 8
359 #define DA7218_OUT_1_VOICE_EN_SHIFT 3
360 #define DA7218_OUT_1_VOICE_EN_MASK (0x1 << 3)
361 #define DA7218_OUT_1_AUDIO_HPF_CORNER_SHIFT 4
362 #define DA7218_OUT_1_AUDIO_HPF_CORNER_MASK (0x3 << 4)
363 #define DA7218_AUDIO_HPF_CORNER_MAX 4
364 #define DA7218_OUT_1_HPF_EN_SHIFT 7
365 #define DA7218_OUT_1_HPF_EN_MASK (0x1 << 7)
366 #define DA7218_HPF_MODE_SHIFT 0
367 #define DA7218_HPF_DISABLED ((0x0 << 3) | (0x0 << 7))
368 #define DA7218_HPF_AUDIO_EN ((0x0 << 3) | (0x1 << 7))
369 #define DA7218_HPF_VOICE_EN ((0x1 << 3) | (0x1 << 7))
370 #define DA7218_HPF_MODE_MASK ((0x1 << 3) | (0x1 << 7))
371 #define DA7218_HPF_MODE_MAX 3
373 /* DA7218_OUT_1_EQ_12_FILTER_CTRL = 0x25 */
374 #define DA7218_OUT_1_EQ_BAND1_SHIFT 0
375 #define DA7218_OUT_1_EQ_BAND1_MASK (0xF << 0)
376 #define DA7218_OUT_EQ_BAND_MAX 0xF
377 #define DA7218_OUT_1_EQ_BAND2_SHIFT 4
378 #define DA7218_OUT_1_EQ_BAND2_MASK (0xF << 4)
380 /* DA7218_OUT_1_EQ_34_FILTER_CTRL = 0x26 */
381 #define DA7218_OUT_1_EQ_BAND3_SHIFT 0
382 #define DA7218_OUT_1_EQ_BAND3_MASK (0xF << 0)
383 #define DA7218_OUT_1_EQ_BAND4_SHIFT 4
384 #define DA7218_OUT_1_EQ_BAND4_MASK (0xF << 4)
386 /* DA7218_OUT_1_EQ_5_FILTER_CTRL = 0x27 */
387 #define DA7218_OUT_1_EQ_BAND5_SHIFT 0
388 #define DA7218_OUT_1_EQ_BAND5_MASK (0xF << 0)
389 #define DA7218_OUT_1_EQ_EN_SHIFT 7
390 #define DA7218_OUT_1_EQ_EN_MASK (0x1 << 7)
392 /* DA7218_OUT_1_BIQ_5STAGE_CTRL = 0x28 */
393 #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_SHIFT 6
394 #define DA7218_OUT_1_BIQ_5STAGE_MUTE_EN_MASK (0x1 << 6)
395 #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_SHIFT 7
396 #define DA7218_OUT_1_BIQ_5STAGE_FILTER_EN_MASK (0x1 << 7)
398 /* DA7218_OUT_1_BIQ_5STAGE_DATA = 0x29 */
399 #define DA7218_OUT_1_BIQ_5STAGE_DATA_SHIFT 0
400 #define DA7218_OUT_1_BIQ_5STAGE_DATA_MASK (0xFF << 0)
402 /* DA7218_OUT_1_BIQ_5STAGE_ADDR = 0x2A */
403 #define DA7218_OUT_1_BIQ_5STAGE_ADDR_SHIFT 0
404 #define DA7218_OUT_1_BIQ_5STAGE_ADDR_MASK (0x3F << 0)
405 #define DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE 50
407 /* DA7218_MIXIN_1_CTRL = 0x2C */
408 #define DA7218_MIXIN_1_MIX_SEL_SHIFT 3
409 #define DA7218_MIXIN_1_MIX_SEL_MASK (0x1 << 3)
410 #define DA7218_MIXIN_1_AMP_ZC_EN_SHIFT 4
411 #define DA7218_MIXIN_1_AMP_ZC_EN_MASK (0x1 << 4)
412 #define DA7218_MIXIN_1_AMP_RAMP_EN_SHIFT 5
413 #define DA7218_MIXIN_1_AMP_RAMP_EN_MASK (0x1 << 5)
414 #define DA7218_MIXIN_1_AMP_MUTE_EN_SHIFT 6
415 #define DA7218_MIXIN_1_AMP_MUTE_EN_MASK (0x1 << 6)
416 #define DA7218_MIXIN_1_AMP_EN_SHIFT 7
417 #define DA7218_MIXIN_1_AMP_EN_MASK (0x1 << 7)
419 /* DA7218_MIXIN_1_GAIN = 0x2D */
420 #define DA7218_MIXIN_1_AMP_GAIN_SHIFT 0
421 #define DA7218_MIXIN_1_AMP_GAIN_MASK (0xF << 0)
422 #define DA7218_MIXIN_AMP_GAIN_MAX 0xF
424 /* DA7218_MIXIN_2_CTRL = 0x2E */
425 #define DA7218_MIXIN_2_MIX_SEL_SHIFT 3
426 #define DA7218_MIXIN_2_MIX_SEL_MASK (0x1 << 3)
427 #define DA7218_MIXIN_2_AMP_ZC_EN_SHIFT 4
428 #define DA7218_MIXIN_2_AMP_ZC_EN_MASK (0x1 << 4)
429 #define DA7218_MIXIN_2_AMP_RAMP_EN_SHIFT 5
430 #define DA7218_MIXIN_2_AMP_RAMP_EN_MASK (0x1 << 5)
431 #define DA7218_MIXIN_2_AMP_MUTE_EN_SHIFT 6
432 #define DA7218_MIXIN_2_AMP_MUTE_EN_MASK (0x1 << 6)
433 #define DA7218_MIXIN_2_AMP_EN_SHIFT 7
434 #define DA7218_MIXIN_2_AMP_EN_MASK (0x1 << 7)
436 /* DA7218_MIXIN_2_GAIN = 0x2F */
437 #define DA7218_MIXIN_2_AMP_GAIN_SHIFT 0
438 #define DA7218_MIXIN_2_AMP_GAIN_MASK (0xF << 0)
440 /* DA7218_ALC_CTRL1 = 0x30 */
441 #define DA7218_ALC_EN_SHIFT 0
442 #define DA7218_ALC_EN_MASK (0xF << 0)
443 #define DA7218_ALC_CHAN1_L_EN_SHIFT 0
444 #define DA7218_ALC_CHAN1_R_EN_SHIFT 1
445 #define DA7218_ALC_CHAN2_L_EN_SHIFT 2
446 #define DA7218_ALC_CHAN2_R_EN_SHIFT 3
447 #define DA7218_ALC_SYNC_MODE_SHIFT 4
448 #define DA7218_ALC_SYNC_MODE_MASK (0xF << 4)
449 #define DA7218_ALC_SYNC_MODE_CH1 (0x1 << 4)
450 #define DA7218_ALC_SYNC_MODE_CH2 (0x4 << 4)
452 /* DA7218_ALC_CTRL2 = 0x31 */
453 #define DA7218_ALC_ATTACK_SHIFT 0
454 #define DA7218_ALC_ATTACK_MASK (0xF << 0)
455 #define DA7218_ALC_ATTACK_MAX 13
456 #define DA7218_ALC_RELEASE_SHIFT 4
457 #define DA7218_ALC_RELEASE_MASK (0xF << 4)
458 #define DA7218_ALC_RELEASE_MAX 11
460 /* DA7218_ALC_CTRL3 = 0x32 */
461 #define DA7218_ALC_HOLD_SHIFT 0
462 #define DA7218_ALC_HOLD_MASK (0xF << 0)
463 #define DA7218_ALC_HOLD_MAX 16
465 /* DA7218_ALC_NOISE = 0x33 */
466 #define DA7218_ALC_NOISE_SHIFT 0
467 #define DA7218_ALC_NOISE_MASK (0x3F << 0)
468 #define DA7218_ALC_THRESHOLD_MAX 0x3F
470 /* DA7218_ALC_TARGET_MIN = 0x34 */
471 #define DA7218_ALC_THRESHOLD_MIN_SHIFT 0
472 #define DA7218_ALC_THRESHOLD_MIN_MASK (0x3F << 0)
474 /* DA7218_ALC_TARGET_MAX = 0x35 */
475 #define DA7218_ALC_THRESHOLD_MAX_SHIFT 0
476 #define DA7218_ALC_THRESHOLD_MAX_MASK (0x3F << 0)
478 /* DA7218_ALC_GAIN_LIMITS = 0x36 */
479 #define DA7218_ALC_ATTEN_MAX_SHIFT 0
480 #define DA7218_ALC_ATTEN_MAX_MASK (0xF << 0)
481 #define DA7218_ALC_ATTEN_GAIN_MAX 0xF
482 #define DA7218_ALC_GAIN_MAX_SHIFT 4
483 #define DA7218_ALC_GAIN_MAX_MASK (0xF << 4)
485 /* DA7218_ALC_ANA_GAIN_LIMITS = 0x37 */
486 #define DA7218_ALC_ANA_GAIN_MIN_SHIFT 0
487 #define DA7218_ALC_ANA_GAIN_MIN_MASK (0x7 << 0)
488 #define DA7218_ALC_ANA_GAIN_MIN 0x1
489 #define DA7218_ALC_ANA_GAIN_MAX 0x7
490 #define DA7218_ALC_ANA_GAIN_MAX_SHIFT 4
491 #define DA7218_ALC_ANA_GAIN_MAX_MASK (0x7 << 4)
493 /* DA7218_ALC_ANTICLIP_CTRL = 0x38 */
494 #define DA7218_ALC_ANTICLIP_STEP_SHIFT 0
495 #define DA7218_ALC_ANTICLIP_STEP_MASK (0x3 << 0)
496 #define DA7218_ALC_ANTICLIP_STEP_MAX 4
497 #define DA7218_ALC_ANTICLIP_EN_SHIFT 7
498 #define DA7218_ALC_ANTICLIP_EN_MASK (0x1 << 7)
500 /* DA7218_AGS_ENABLE = 0x3C */
501 #define DA7218_AGS_ENABLE_SHIFT 0
502 #define DA7218_AGS_ENABLE_MASK (0x3 << 0)
503 #define DA7218_AGS_ENABLE_CHAN1_SHIFT 0
504 #define DA7218_AGS_ENABLE_CHAN2_SHIFT 1
506 /* DA7218_AGS_TRIGGER = 0x3D */
507 #define DA7218_AGS_TRIGGER_SHIFT 0
508 #define DA7218_AGS_TRIGGER_MASK (0xF << 0)
509 #define DA7218_AGS_TRIGGER_MAX 0xF
511 /* DA7218_AGS_ATT_MAX = 0x3E */
512 #define DA7218_AGS_ATT_MAX_SHIFT 0
513 #define DA7218_AGS_ATT_MAX_MASK (0x7 << 0)
514 #define DA7218_AGS_ATT_MAX_MAX 0x7
516 /* DA7218_AGS_TIMEOUT = 0x3F */
517 #define DA7218_AGS_TIMEOUT_EN_SHIFT 0
518 #define DA7218_AGS_TIMEOUT_EN_MASK (0x1 << 0)
520 /* DA7218_AGS_ANTICLIP_CTRL = 0x40 */
521 #define DA7218_AGS_ANTICLIP_EN_SHIFT 7
522 #define DA7218_AGS_ANTICLIP_EN_MASK (0x1 << 7)
524 /* DA7218_CALIB_CTRL = 0x44 */
525 #define DA7218_CALIB_OFFSET_EN_SHIFT 0
526 #define DA7218_CALIB_OFFSET_EN_MASK (0x1 << 0)
527 #define DA7218_CALIB_AUTO_EN_SHIFT 2
528 #define DA7218_CALIB_AUTO_EN_MASK (0x1 << 2)
529 #define DA7218_CALIB_OVERFLOW_SHIFT 3
530 #define DA7218_CALIB_OVERFLOW_MASK (0x1 << 3)
532 /* DA7218_CALIB_OFFSET_AUTO_M_1 = 0x45 */
533 #define DA7218_CALIB_OFFSET_AUTO_M_1_SHIFT 0
534 #define DA7218_CALIB_OFFSET_AUTO_M_1_MASK (0xFF << 0)
536 /* DA7218_CALIB_OFFSET_AUTO_U_1 = 0x46 */
537 #define DA7218_CALIB_OFFSET_AUTO_U_1_SHIFT 0
538 #define DA7218_CALIB_OFFSET_AUTO_U_1_MASK (0xF << 0)
540 /* DA7218_CALIB_OFFSET_AUTO_M_2 = 0x47 */
541 #define DA7218_CALIB_OFFSET_AUTO_M_2_SHIFT 0
542 #define DA7218_CALIB_OFFSET_AUTO_M_2_MASK (0xFF << 0)
544 /* DA7218_CALIB_OFFSET_AUTO_U_2 = 0x48 */
545 #define DA7218_CALIB_OFFSET_AUTO_U_2_SHIFT 0
546 #define DA7218_CALIB_OFFSET_AUTO_U_2_MASK (0xF << 0)
548 /* DA7218_ENV_TRACK_CTRL = 0x4C */
549 #define DA7218_INTEG_ATTACK_SHIFT 0
550 #define DA7218_INTEG_ATTACK_MASK (0x3 << 0)
551 #define DA7218_INTEG_RELEASE_SHIFT 4
552 #define DA7218_INTEG_RELEASE_MASK (0x3 << 4)
553 #define DA7218_INTEG_MAX 4
555 /* DA7218_LVL_DET_CTRL = 0x50 */
556 #define DA7218_LVL_DET_EN_SHIFT 0
557 #define DA7218_LVL_DET_EN_MASK (0xF << 0)
558 #define DA7218_LVL_DET_EN_CHAN1L_SHIFT 0
559 #define DA7218_LVL_DET_EN_CHAN1R_SHIFT 1
560 #define DA7218_LVL_DET_EN_CHAN2L_SHIFT 2
561 #define DA7218_LVL_DET_EN_CHAN2R_SHIFT 3
563 /* DA7218_LVL_DET_LEVEL = 0x51 */
564 #define DA7218_LVL_DET_LEVEL_SHIFT 0
565 #define DA7218_LVL_DET_LEVEL_MASK (0x7F << 0)
566 #define DA7218_LVL_DET_LEVEL_MAX 0x7F
568 /* DA7218_DGS_TRIGGER = 0x54 */
569 #define DA7218_DGS_TRIGGER_LVL_SHIFT 0
570 #define DA7218_DGS_TRIGGER_LVL_MASK (0x3F << 0)
571 #define DA7218_DGS_TRIGGER_MAX 0x3F
573 /* DA7218_DGS_ENABLE = 0x55 */
574 #define DA7218_DGS_ENABLE_SHIFT 0
575 #define DA7218_DGS_ENABLE_MASK (0x3 << 0)
576 #define DA7218_DGS_ENABLE_L_SHIFT 0
577 #define DA7218_DGS_ENABLE_R_SHIFT 1
579 /* DA7218_DGS_RISE_FALL = 0x56 */
580 #define DA7218_DGS_RISE_COEFF_SHIFT 0
581 #define DA7218_DGS_RISE_COEFF_MASK (0x7 << 0)
582 #define DA7218_DGS_RISE_COEFF_MAX 7
583 #define DA7218_DGS_FALL_COEFF_SHIFT 4
584 #define DA7218_DGS_FALL_COEFF_MASK (0x7 << 4)
585 #define DA7218_DGS_FALL_COEFF_MAX 8
587 /* DA7218_DGS_SYNC_DELAY = 0x57 */
588 #define DA7218_DGS_SYNC_DELAY_SHIFT 0
589 #define DA7218_DGS_SYNC_DELAY_MASK (0xFF << 0)
590 #define DA7218_DGS_SYNC_DELAY_MAX 0xFF
592 /* DA7218_DGS_SYNC_DELAY2 = 0x58 */
593 #define DA7218_DGS_SYNC_DELAY2_SHIFT 0
594 #define DA7218_DGS_SYNC_DELAY2_MASK (0xFF << 0)
596 /* DA7218_DGS_SYNC_DELAY3 = 0x59 */
597 #define DA7218_DGS_SYNC_DELAY3_SHIFT 0
598 #define DA7218_DGS_SYNC_DELAY3_MASK (0x7F << 0)
599 #define DA7218_DGS_SYNC_DELAY3_MAX 0x7F
601 /* DA7218_DGS_LEVELS = 0x5A */
602 #define DA7218_DGS_ANTICLIP_LVL_SHIFT 0
603 #define DA7218_DGS_ANTICLIP_LVL_MASK (0x7 << 0)
604 #define DA7218_DGS_ANTICLIP_LVL_MAX 0x7
605 #define DA7218_DGS_SIGNAL_LVL_SHIFT 4
606 #define DA7218_DGS_SIGNAL_LVL_MASK (0xF << 4)
607 #define DA7218_DGS_SIGNAL_LVL_MAX 0xF
609 /* DA7218_DGS_GAIN_CTRL = 0x5B */
610 #define DA7218_DGS_STEPS_SHIFT 0
611 #define DA7218_DGS_STEPS_MASK (0x1F << 0)
612 #define DA7218_DGS_STEPS_MAX 0x1F
613 #define DA7218_DGS_RAMP_EN_SHIFT 5
614 #define DA7218_DGS_RAMP_EN_MASK (0x1 << 5)
615 #define DA7218_DGS_SUBR_EN_SHIFT 6
616 #define DA7218_DGS_SUBR_EN_MASK (0x1 << 6)
618 /* DA7218_DROUTING_OUTDAI_1L = 0x5C */
619 #define DA7218_OUTDAI_1L_SRC_SHIFT 0
620 #define DA7218_OUTDAI_1L_SRC_MASK (0x7F << 0)
621 #define DA7218_DMIX_SRC_INFILT1L 0
622 #define DA7218_DMIX_SRC_INFILT1R 1
623 #define DA7218_DMIX_SRC_INFILT2L 2
624 #define DA7218_DMIX_SRC_INFILT2R 3
625 #define DA7218_DMIX_SRC_TONEGEN 4
626 #define DA7218_DMIX_SRC_DAIL 5
627 #define DA7218_DMIX_SRC_DAIR 6
629 /* DA7218_DMIX_OUTDAI_1L_INFILT_1L_GAIN = 0x5D */
630 #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_SHIFT 0
631 #define DA7218_OUTDAI_1L_INFILT_1L_GAIN_MASK (0x1F << 0)
632 #define DA7218_DMIX_GAIN_MAX 0x1F
634 /* DA7218_DMIX_OUTDAI_1L_INFILT_1R_GAIN = 0x5E */
635 #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_SHIFT 0
636 #define DA7218_OUTDAI_1L_INFILT_1R_GAIN_MASK (0x1F << 0)
638 /* DA7218_DMIX_OUTDAI_1L_INFILT_2L_GAIN = 0x5F */
639 #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_SHIFT 0
640 #define DA7218_OUTDAI_1L_INFILT_2L_GAIN_MASK (0x1F << 0)
642 /* DA7218_DMIX_OUTDAI_1L_INFILT_2R_GAIN = 0x60 */
643 #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_SHIFT 0
644 #define DA7218_OUTDAI_1L_INFILT_2R_GAIN_MASK (0x1F << 0)
646 /* DA7218_DMIX_OUTDAI_1L_TONEGEN_GAIN = 0x61 */
647 #define DA7218_OUTDAI_1L_TONEGEN_GAIN_SHIFT 0
648 #define DA7218_OUTDAI_1L_TONEGEN_GAIN_MASK (0x1F << 0)
650 /* DA7218_DMIX_OUTDAI_1L_INDAI_1L_GAIN = 0x62 */
651 #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_SHIFT 0
652 #define DA7218_OUTDAI_1L_INDAI_1L_GAIN_MASK (0x1F << 0)
654 /* DA7218_DMIX_OUTDAI_1L_INDAI_1R_GAIN = 0x63 */
655 #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_SHIFT 0
656 #define DA7218_OUTDAI_1L_INDAI_1R_GAIN_MASK (0x1F << 0)
658 /* DA7218_DROUTING_OUTDAI_1R = 0x64 */
659 #define DA7218_OUTDAI_1R_SRC_SHIFT 0
660 #define DA7218_OUTDAI_1R_SRC_MASK (0x7F << 0)
662 /* DA7218_DMIX_OUTDAI_1R_INFILT_1L_GAIN = 0x65 */
663 #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_SHIFT 0
664 #define DA7218_OUTDAI_1R_INFILT_1L_GAIN_MASK (0x1F << 0)
666 /* DA7218_DMIX_OUTDAI_1R_INFILT_1R_GAIN = 0x66 */
667 #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_SHIFT 0
668 #define DA7218_OUTDAI_1R_INFILT_1R_GAIN_MASK (0x1F << 0)
670 /* DA7218_DMIX_OUTDAI_1R_INFILT_2L_GAIN = 0x67 */
671 #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_SHIFT 0
672 #define DA7218_OUTDAI_1R_INFILT_2L_GAIN_MASK (0x1F << 0)
674 /* DA7218_DMIX_OUTDAI_1R_INFILT_2R_GAIN = 0x68 */
675 #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_SHIFT 0
676 #define DA7218_OUTDAI_1R_INFILT_2R_GAIN_MASK (0x1F << 0)
678 /* DA7218_DMIX_OUTDAI_1R_TONEGEN_GAIN = 0x69 */
679 #define DA7218_OUTDAI_1R_TONEGEN_GAIN_SHIFT 0
680 #define DA7218_OUTDAI_1R_TONEGEN_GAIN_MASK (0x1F << 0)
682 /* DA7218_DMIX_OUTDAI_1R_INDAI_1L_GAIN = 0x6A */
683 #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_SHIFT 0
684 #define DA7218_OUTDAI_1R_INDAI_1L_GAIN_MASK (0x1F << 0)
686 /* DA7218_DMIX_OUTDAI_1R_INDAI_1R_GAIN = 0x6B */
687 #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_SHIFT 0
688 #define DA7218_OUTDAI_1R_INDAI_1R_GAIN_MASK (0x1F << 0)
690 /* DA7218_DROUTING_OUTFILT_1L = 0x6C */
691 #define DA7218_OUTFILT_1L_SRC_SHIFT 0
692 #define DA7218_OUTFILT_1L_SRC_MASK (0x7F << 0)
694 /* DA7218_DMIX_OUTFILT_1L_INFILT_1L_GAIN = 0x6D */
695 #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_SHIFT 0
696 #define DA7218_OUTFILT_1L_INFILT_1L_GAIN_MASK (0x1F << 0)
698 /* DA7218_DMIX_OUTFILT_1L_INFILT_1R_GAIN = 0x6E */
699 #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_SHIFT 0
700 #define DA7218_OUTFILT_1L_INFILT_1R_GAIN_MASK (0x1F << 0)
702 /* DA7218_DMIX_OUTFILT_1L_INFILT_2L_GAIN = 0x6F */
703 #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_SHIFT 0
704 #define DA7218_OUTFILT_1L_INFILT_2L_GAIN_MASK (0x1F << 0)
706 /* DA7218_DMIX_OUTFILT_1L_INFILT_2R_GAIN = 0x70 */
707 #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_SHIFT 0
708 #define DA7218_OUTFILT_1L_INFILT_2R_GAIN_MASK (0x1F << 0)
710 /* DA7218_DMIX_OUTFILT_1L_TONEGEN_GAIN = 0x71 */
711 #define DA7218_OUTFILT_1L_TONEGEN_GAIN_SHIFT 0
712 #define DA7218_OUTFILT_1L_TONEGEN_GAIN_MASK (0x1F << 0)
714 /* DA7218_DMIX_OUTFILT_1L_INDAI_1L_GAIN = 0x72 */
715 #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_SHIFT 0
716 #define DA7218_OUTFILT_1L_INDAI_1L_GAIN_MASK (0x1F << 0)
718 /* DA7218_DMIX_OUTFILT_1L_INDAI_1R_GAIN = 0x73 */
719 #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_SHIFT 0
720 #define DA7218_OUTFILT_1L_INDAI_1R_GAIN_MASK (0x1F << 0)
722 /* DA7218_DROUTING_OUTFILT_1R = 0x74 */
723 #define DA7218_OUTFILT_1R_SRC_SHIFT 0
724 #define DA7218_OUTFILT_1R_SRC_MASK (0x7F << 0)
726 /* DA7218_DMIX_OUTFILT_1R_INFILT_1L_GAIN = 0x75 */
727 #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_SHIFT 0
728 #define DA7218_OUTFILT_1R_INFILT_1L_GAIN_MASK (0x1F << 0)
730 /* DA7218_DMIX_OUTFILT_1R_INFILT_1R_GAIN = 0x76 */
731 #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_SHIFT 0
732 #define DA7218_OUTFILT_1R_INFILT_1R_GAIN_MASK (0x1F << 0)
734 /* DA7218_DMIX_OUTFILT_1R_INFILT_2L_GAIN = 0x77 */
735 #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_SHIFT 0
736 #define DA7218_OUTFILT_1R_INFILT_2L_GAIN_MASK (0x1F << 0)
738 /* DA7218_DMIX_OUTFILT_1R_INFILT_2R_GAIN = 0x78 */
739 #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_SHIFT 0
740 #define DA7218_OUTFILT_1R_INFILT_2R_GAIN_MASK (0x1F << 0)
742 /* DA7218_DMIX_OUTFILT_1R_TONEGEN_GAIN = 0x79 */
743 #define DA7218_OUTFILT_1R_TONEGEN_GAIN_SHIFT 0
744 #define DA7218_OUTFILT_1R_TONEGEN_GAIN_MASK (0x1F << 0)
746 /* DA7218_DMIX_OUTFILT_1R_INDAI_1L_GAIN = 0x7A */
747 #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_SHIFT 0
748 #define DA7218_OUTFILT_1R_INDAI_1L_GAIN_MASK (0x1F << 0)
750 /* DA7218_DMIX_OUTFILT_1R_INDAI_1R_GAIN = 0x7B */
751 #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_SHIFT 0
752 #define DA7218_OUTFILT_1R_INDAI_1R_GAIN_MASK (0x1F << 0)
754 /* DA7218_DROUTING_OUTDAI_2L = 0x7C */
755 #define DA7218_OUTDAI_2L_SRC_SHIFT 0
756 #define DA7218_OUTDAI_2L_SRC_MASK (0x7F << 0)
758 /* DA7218_DMIX_OUTDAI_2L_INFILT_1L_GAIN = 0x7D */
759 #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_SHIFT 0
760 #define DA7218_OUTDAI_2L_INFILT_1L_GAIN_MASK (0x1F << 0)
762 /* DA7218_DMIX_OUTDAI_2L_INFILT_1R_GAIN = 0x7E */
763 #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_SHIFT 0
764 #define DA7218_OUTDAI_2L_INFILT_1R_GAIN_MASK (0x1F << 0)
766 /* DA7218_DMIX_OUTDAI_2L_INFILT_2L_GAIN = 0x7F */
767 #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_SHIFT 0
768 #define DA7218_OUTDAI_2L_INFILT_2L_GAIN_MASK (0x1F << 0)
770 /* DA7218_DMIX_OUTDAI_2L_INFILT_2R_GAIN = 0x80 */
771 #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_SHIFT 0
772 #define DA7218_OUTDAI_2L_INFILT_2R_GAIN_MASK (0x1F << 0)
774 /* DA7218_DMIX_OUTDAI_2L_TONEGEN_GAIN = 0x81 */
775 #define DA7218_OUTDAI_2L_TONEGEN_GAIN_SHIFT 0
776 #define DA7218_OUTDAI_2L_TONEGEN_GAIN_MASK (0x1F << 0)
778 /* DA7218_DMIX_OUTDAI_2L_INDAI_1L_GAIN = 0x82 */
779 #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_SHIFT 0
780 #define DA7218_OUTDAI_2L_INDAI_1L_GAIN_MASK (0x1F << 0)
782 /* DA7218_DMIX_OUTDAI_2L_INDAI_1R_GAIN = 0x83 */
783 #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_SHIFT 0
784 #define DA7218_OUTDAI_2L_INDAI_1R_GAIN_MASK (0x1F << 0)
786 /* DA7218_DROUTING_OUTDAI_2R = 0x84 */
787 #define DA7218_OUTDAI_2R_SRC_SHIFT 0
788 #define DA7218_OUTDAI_2R_SRC_MASK (0x7F << 0)
790 /* DA7218_DMIX_OUTDAI_2R_INFILT_1L_GAIN = 0x85 */
791 #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_SHIFT 0
792 #define DA7218_OUTDAI_2R_INFILT_1L_GAIN_MASK (0x1F << 0)
794 /* DA7218_DMIX_OUTDAI_2R_INFILT_1R_GAIN = 0x86 */
795 #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_SHIFT 0
796 #define DA7218_OUTDAI_2R_INFILT_1R_GAIN_MASK (0x1F << 0)
798 /* DA7218_DMIX_OUTDAI_2R_INFILT_2L_GAIN = 0x87 */
799 #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_SHIFT 0
800 #define DA7218_OUTDAI_2R_INFILT_2L_GAIN_MASK (0x1F << 0)
802 /* DA7218_DMIX_OUTDAI_2R_INFILT_2R_GAIN = 0x88 */
803 #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_SHIFT 0
804 #define DA7218_OUTDAI_2R_INFILT_2R_GAIN_MASK (0x1F << 0)
806 /* DA7218_DMIX_OUTDAI_2R_TONEGEN_GAIN = 0x89 */
807 #define DA7218_OUTDAI_2R_TONEGEN_GAIN_SHIFT 0
808 #define DA7218_OUTDAI_2R_TONEGEN_GAIN_MASK (0x1F << 0)
810 /* DA7218_DMIX_OUTDAI_2R_INDAI_1L_GAIN = 0x8A */
811 #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_SHIFT 0
812 #define DA7218_OUTDAI_2R_INDAI_1L_GAIN_MASK (0x1F << 0)
814 /* DA7218_DMIX_OUTDAI_2R_INDAI_1R_GAIN = 0x8B */
815 #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_SHIFT 0
816 #define DA7218_OUTDAI_2R_INDAI_1R_GAIN_MASK (0x1F << 0)
818 /* DA7218_DAI_CTRL = 0x8C */
819 #define DA7218_DAI_FORMAT_SHIFT 0
820 #define DA7218_DAI_FORMAT_MASK (0x3 << 0)
821 #define DA7218_DAI_FORMAT_I2S (0x0 << 0)
822 #define DA7218_DAI_FORMAT_LEFT_J (0x1 << 0)
823 #define DA7218_DAI_FORMAT_RIGHT_J (0x2 << 0)
824 #define DA7218_DAI_FORMAT_DSP (0x3 << 0)
825 #define DA7218_DAI_WORD_LENGTH_SHIFT 2
826 #define DA7218_DAI_WORD_LENGTH_MASK (0x3 << 2)
827 #define DA7218_DAI_WORD_LENGTH_S16_LE (0x0 << 2)
828 #define DA7218_DAI_WORD_LENGTH_S20_LE (0x1 << 2)
829 #define DA7218_DAI_WORD_LENGTH_S24_LE (0x2 << 2)
830 #define DA7218_DAI_WORD_LENGTH_S32_LE (0x3 << 2)
831 #define DA7218_DAI_CH_NUM_SHIFT 4
832 #define DA7218_DAI_CH_NUM_MASK (0x7 << 4)
833 #define DA7218_DAI_CH_NUM_MAX 4
834 #define DA7218_DAI_EN_SHIFT 7
835 #define DA7218_DAI_EN_MASK (0x1 << 7)
837 /* DA7218_DAI_TDM_CTRL = 0x8D */
838 #define DA7218_DAI_TDM_CH_EN_SHIFT 0
839 #define DA7218_DAI_TDM_CH_EN_MASK (0xF << 0)
840 #define DA7218_DAI_TDM_MAX_SLOTS 4
841 #define DA7218_DAI_OE_SHIFT 6
842 #define DA7218_DAI_OE_MASK (0x1 << 6)
843 #define DA7218_DAI_TDM_MODE_EN_SHIFT 7
844 #define DA7218_DAI_TDM_MODE_EN_MASK (0x1 << 7)
846 /* DA7218_DAI_OFFSET_LOWER = 0x8E */
847 #define DA7218_DAI_OFFSET_LOWER_SHIFT 0
848 #define DA7218_DAI_OFFSET_LOWER_MASK (0xFF << 0)
850 /* DA7218_DAI_OFFSET_UPPER = 0x8F */
851 #define DA7218_DAI_OFFSET_UPPER_SHIFT 0
852 #define DA7218_DAI_OFFSET_UPPER_MASK (0x7 << 0)
854 /* DA7218_DAI_CLK_MODE = 0x90 */
855 #define DA7218_DAI_BCLKS_PER_WCLK_SHIFT 0
856 #define DA7218_DAI_BCLKS_PER_WCLK_MASK (0x3 << 0)
857 #define DA7218_DAI_BCLKS_PER_WCLK_32 (0x0 << 0)
858 #define DA7218_DAI_BCLKS_PER_WCLK_64 (0x1 << 0)
859 #define DA7218_DAI_BCLKS_PER_WCLK_128 (0x2 << 0)
860 #define DA7218_DAI_BCLKS_PER_WCLK_256 (0x3 << 0)
861 #define DA7218_DAI_CLK_POL_SHIFT 2
862 #define DA7218_DAI_CLK_POL_MASK (0x1 << 2)
863 #define DA7218_DAI_CLK_POL_INV (0x1 << 2)
864 #define DA7218_DAI_WCLK_POL_SHIFT 3
865 #define DA7218_DAI_WCLK_POL_MASK (0x1 << 3)
866 #define DA7218_DAI_WCLK_POL_INV (0x1 << 3)
867 #define DA7218_DAI_WCLK_TRI_STATE_SHIFT 4
868 #define DA7218_DAI_WCLK_TRI_STATE_MASK (0x1 << 4)
869 #define DA7218_DAI_CLK_EN_SHIFT 7
870 #define DA7218_DAI_CLK_EN_MASK (0x1 << 7)
872 /* DA7218_PLL_CTRL = 0x91 */
873 #define DA7218_PLL_INDIV_SHIFT 0
874 #define DA7218_PLL_INDIV_MASK (0x7 << 0)
875 #define DA7218_PLL_INDIV_2_TO_4_5_MHZ (0x0 << 0)
876 #define DA7218_PLL_INDIV_4_5_TO_9_MHZ (0x1 << 0)
877 #define DA7218_PLL_INDIV_9_TO_18_MHZ (0x2 << 0)
878 #define DA7218_PLL_INDIV_18_TO_36_MHZ (0x3 << 0)
879 #define DA7218_PLL_INDIV_36_TO_54_MHZ (0x4 << 0)
880 #define DA7218_PLL_MCLK_SQR_EN_SHIFT 4
881 #define DA7218_PLL_MCLK_SQR_EN_MASK (0x1 << 4)
882 #define DA7218_PLL_MODE_SHIFT 6
883 #define DA7218_PLL_MODE_MASK (0x3 << 6)
884 #define DA7218_PLL_MODE_BYPASS (0x0 << 6)
885 #define DA7218_PLL_MODE_NORMAL (0x1 << 6)
886 #define DA7218_PLL_MODE_SRM (0x2 << 6)
888 /* DA7218_PLL_FRAC_TOP = 0x92 */
889 #define DA7218_PLL_FBDIV_FRAC_TOP_SHIFT 0
890 #define DA7218_PLL_FBDIV_FRAC_TOP_MASK (0x1F << 0)
892 /* DA7218_PLL_FRAC_BOT = 0x93 */
893 #define DA7218_PLL_FBDIV_FRAC_BOT_SHIFT 0
894 #define DA7218_PLL_FBDIV_FRAC_BOT_MASK (0xFF << 0)
896 /* DA7218_PLL_INTEGER = 0x94 */
897 #define DA7218_PLL_FBDIV_INTEGER_SHIFT 0
898 #define DA7218_PLL_FBDIV_INTEGER_MASK (0x7F << 0)
900 /* DA7218_PLL_STATUS = 0x95 */
901 #define DA7218_PLL_SRM_STATUS_SHIFT 0
902 #define DA7218_PLL_SRM_STATUS_MASK (0xFF << 0)
903 #define DA7218_PLL_SRM_STATUS_SRM_LOCK (0x1 << 7)
905 /* DA7218_PLL_REFOSC_CAL = 0x98 */
906 #define DA7218_PLL_REFOSC_CAL_CTRL_SHIFT 0
907 #define DA7218_PLL_REFOSC_CAL_CTRL_MASK (0x1F << 0)
908 #define DA7218_PLL_REFOSC_CAL_START_SHIFT 6
909 #define DA7218_PLL_REFOSC_CAL_START_MASK (0x1 << 6)
910 #define DA7218_PLL_REFOSC_CAL_EN_SHIFT 7
911 #define DA7218_PLL_REFOSC_CAL_EN_MASK (0x1 << 7)
913 /* DA7218_DAC_NG_CTRL = 0x9C */
914 #define DA7218_DAC_NG_EN_SHIFT 7
915 #define DA7218_DAC_NG_EN_MASK (0x1 << 7)
917 /* DA7218_DAC_NG_SETUP_TIME = 0x9D */
918 #define DA7218_DAC_NG_SETUP_TIME_SHIFT 0
919 #define DA7218_DAC_NG_SETUP_TIME_MASK (0x3 << 0)
920 #define DA7218_DAC_NG_SETUP_TIME_MAX 4
921 #define DA7218_DAC_NG_RAMPUP_RATE_SHIFT 2
922 #define DA7218_DAC_NG_RAMPUP_RATE_MASK (0x1 << 2)
923 #define DA7218_DAC_NG_RAMPUP_RATE_MAX 2
924 #define DA7218_DAC_NG_RAMPDN_RATE_SHIFT 3
925 #define DA7218_DAC_NG_RAMPDN_RATE_MASK (0x1 << 3)
926 #define DA7218_DAC_NG_RAMPDN_RATE_MAX 2
928 /* DA7218_DAC_NG_OFF_THRESH = 0x9E */
929 #define DA7218_DAC_NG_OFF_THRESHOLD_SHIFT 0
930 #define DA7218_DAC_NG_OFF_THRESHOLD_MASK (0x7 << 0)
931 #define DA7218_DAC_NG_THRESHOLD_MAX 0x7
933 /* DA7218_DAC_NG_ON_THRESH = 0x9F */
934 #define DA7218_DAC_NG_ON_THRESHOLD_SHIFT 0
935 #define DA7218_DAC_NG_ON_THRESHOLD_MASK (0x7 << 0)
937 /* DA7218_TONE_GEN_CFG1 = 0xA0 */
938 #define DA7218_DTMF_REG_SHIFT 0
939 #define DA7218_DTMF_REG_MASK (0xF << 0)
940 #define DA7218_DTMF_REG_MAX 16
941 #define DA7218_DTMF_EN_SHIFT 4
942 #define DA7218_DTMF_EN_MASK (0x1 << 4)
943 #define DA7218_START_STOPN_SHIFT 7
944 #define DA7218_START_STOPN_MASK (0x1 << 7)
946 /* DA7218_TONE_GEN_CFG2 = 0xA1 */
947 #define DA7218_SWG_SEL_SHIFT 0
948 #define DA7218_SWG_SEL_MASK (0x3 << 0)
949 #define DA7218_SWG_SEL_MAX 4
951 /* DA7218_TONE_GEN_FREQ1_L = 0xA2 */
952 #define DA7218_FREQ1_L_SHIFT 0
953 #define DA7218_FREQ1_L_MASK (0xFF << 0)
954 #define DA7218_FREQ_MAX 0xFFFF
956 /* DA7218_TONE_GEN_FREQ1_U = 0xA3 */
957 #define DA7218_FREQ1_U_SHIFT 0
958 #define DA7218_FREQ1_U_MASK (0xFF << 0)
960 /* DA7218_TONE_GEN_FREQ2_L = 0xA4 */
961 #define DA7218_FREQ2_L_SHIFT 0
962 #define DA7218_FREQ2_L_MASK (0xFF << 0)
964 /* DA7218_TONE_GEN_FREQ2_U = 0xA5 */
965 #define DA7218_FREQ2_U_SHIFT 0
966 #define DA7218_FREQ2_U_MASK (0xFF << 0)
968 /* DA7218_TONE_GEN_CYCLES = 0xA6 */
969 #define DA7218_BEEP_CYCLES_SHIFT 0
970 #define DA7218_BEEP_CYCLES_MASK (0x7 << 0)
972 /* DA7218_TONE_GEN_ON_PER = 0xA7 */
973 #define DA7218_BEEP_ON_PER_SHIFT 0
974 #define DA7218_BEEP_ON_PER_MASK (0x3F << 0)
976 /* DA7218_TONE_GEN_OFF_PER = 0xA8 */
977 #define DA7218_BEEP_OFF_PER_SHIFT 0
978 #define DA7218_BEEP_OFF_PER_MASK (0x3F << 0)
979 #define DA7218_BEEP_ON_OFF_MAX 0x3F
981 /* DA7218_CP_CTRL = 0xAC */
982 #define DA7218_CP_MOD_SHIFT 2
983 #define DA7218_CP_MOD_MASK (0x3 << 2)
984 #define DA7218_CP_MCHANGE_SHIFT 4
985 #define DA7218_CP_MCHANGE_MASK (0x3 << 4)
986 #define DA7218_CP_MCHANGE_REL_MASK 0x3
987 #define DA7218_CP_MCHANGE_MAX 3
988 #define DA7218_CP_MCHANGE_LARGEST_VOL 0x1
989 #define DA7218_CP_MCHANGE_DAC_VOL 0x2
990 #define DA7218_CP_MCHANGE_SIG_MAG 0x3
991 #define DA7218_CP_SMALL_SWITCH_FREQ_EN_SHIFT 6
992 #define DA7218_CP_SMALL_SWITCH_FREQ_EN_MASK (0x1 << 6)
993 #define DA7218_CP_EN_SHIFT 7
994 #define DA7218_CP_EN_MASK (0x1 << 7)
996 /* DA7218_CP_DELAY = 0xAD */
997 #define DA7218_CP_FCONTROL_SHIFT 0
998 #define DA7218_CP_FCONTROL_MASK (0x7 << 0)
999 #define DA7218_CP_FCONTROL_MAX 6
1000 #define DA7218_CP_TAU_DELAY_SHIFT 3
1001 #define DA7218_CP_TAU_DELAY_MASK (0x7 << 3)
1002 #define DA7218_CP_TAU_DELAY_MAX 8
1004 /* DA7218_CP_VOL_THRESHOLD1 = 0xAE */
1005 #define DA7218_CP_THRESH_VDD2_SHIFT 0
1006 #define DA7218_CP_THRESH_VDD2_MASK (0x3F << 0)
1007 #define DA7218_CP_THRESH_VDD2_MAX 0x3F
1009 /* DA7218_MIC_1_CTRL = 0xB4 */
1010 #define DA7218_MIC_1_AMP_MUTE_EN_SHIFT 6
1011 #define DA7218_MIC_1_AMP_MUTE_EN_MASK (0x1 << 6)
1012 #define DA7218_MIC_1_AMP_EN_SHIFT 7
1013 #define DA7218_MIC_1_AMP_EN_MASK (0x1 << 7)
1015 /* DA7218_MIC_1_GAIN = 0xB5 */
1016 #define DA7218_MIC_1_AMP_GAIN_SHIFT 0
1017 #define DA7218_MIC_1_AMP_GAIN_MASK (0x7 << 0)
1018 #define DA7218_MIC_AMP_GAIN_MAX 0x7
1020 /* DA7218_MIC_1_SELECT = 0xB7 */
1021 #define DA7218_MIC_1_AMP_IN_SEL_SHIFT 0
1022 #define DA7218_MIC_1_AMP_IN_SEL_MASK (0x3 << 0)
1024 /* DA7218_MIC_2_CTRL = 0xB8 */
1025 #define DA7218_MIC_2_AMP_MUTE_EN_SHIFT 6
1026 #define DA7218_MIC_2_AMP_MUTE_EN_MASK (0x1 << 6)
1027 #define DA7218_MIC_2_AMP_EN_SHIFT 7
1028 #define DA7218_MIC_2_AMP_EN_MASK (0x1 << 7)
1030 /* DA7218_MIC_2_GAIN = 0xB9 */
1031 #define DA7218_MIC_2_AMP_GAIN_SHIFT 0
1032 #define DA7218_MIC_2_AMP_GAIN_MASK (0x7 << 0)
1034 /* DA7218_MIC_2_SELECT = 0xBB */
1035 #define DA7218_MIC_2_AMP_IN_SEL_SHIFT 0
1036 #define DA7218_MIC_2_AMP_IN_SEL_MASK (0x3 << 0)
1038 /* DA7218_IN_1_HPF_FILTER_CTRL = 0xBC */
1039 #define DA7218_IN_1_VOICE_HPF_CORNER_SHIFT 0
1040 #define DA7218_IN_1_VOICE_HPF_CORNER_MASK (0x7 << 0)
1041 #define DA7218_IN_VOICE_HPF_CORNER_MAX 8
1042 #define DA7218_IN_1_VOICE_EN_SHIFT 3
1043 #define DA7218_IN_1_VOICE_EN_MASK (0x1 << 3)
1044 #define DA7218_IN_1_AUDIO_HPF_CORNER_SHIFT 4
1045 #define DA7218_IN_1_AUDIO_HPF_CORNER_MASK (0x3 << 4)
1046 #define DA7218_IN_1_HPF_EN_SHIFT 7
1047 #define DA7218_IN_1_HPF_EN_MASK (0x1 << 7)
1049 /* DA7218_IN_2_HPF_FILTER_CTRL = 0xBD */
1050 #define DA7218_IN_2_VOICE_HPF_CORNER_SHIFT 0
1051 #define DA7218_IN_2_VOICE_HPF_CORNER_MASK (0x7 << 0)
1052 #define DA7218_IN_2_VOICE_EN_SHIFT 3
1053 #define DA7218_IN_2_VOICE_EN_MASK (0x1 << 3)
1054 #define DA7218_IN_2_AUDIO_HPF_CORNER_SHIFT 4
1055 #define DA7218_IN_2_AUDIO_HPF_CORNER_MASK (0x3 << 4)
1056 #define DA7218_IN_2_HPF_EN_SHIFT 7
1057 #define DA7218_IN_2_HPF_EN_MASK (0x1 << 7)
1059 /* DA7218_ADC_1_CTRL = 0xC0 */
1060 #define DA7218_ADC_1_AAF_EN_SHIFT 2
1061 #define DA7218_ADC_1_AAF_EN_MASK (0x1 << 2)
1063 /* DA7218_ADC_2_CTRL = 0xC1 */
1064 #define DA7218_ADC_2_AAF_EN_SHIFT 2
1065 #define DA7218_ADC_2_AAF_EN_MASK (0x1 << 2)
1067 /* DA7218_ADC_MODE = 0xC2 */
1068 #define DA7218_ADC_LP_MODE_SHIFT 0
1069 #define DA7218_ADC_LP_MODE_MASK (0x1 << 0)
1070 #define DA7218_ADC_LVLDET_MODE_SHIFT 1
1071 #define DA7218_ADC_LVLDET_MODE_MASK (0x1 << 1)
1072 #define DA7218_ADC_LVLDET_AUTO_EXIT_SHIFT 2
1073 #define DA7218_ADC_LVLDET_AUTO_EXIT_MASK (0x1 << 2)
1075 /* DA7218_MIXOUT_L_CTRL = 0xCC */
1076 #define DA7218_MIXOUT_L_AMP_EN_SHIFT 7
1077 #define DA7218_MIXOUT_L_AMP_EN_MASK (0x1 << 7)
1079 /* DA7218_MIXOUT_L_GAIN = 0xCD */
1080 #define DA7218_MIXOUT_L_AMP_GAIN_SHIFT 0
1081 #define DA7218_MIXOUT_L_AMP_GAIN_MASK (0x3 << 0)
1082 #define DA7218_MIXOUT_AMP_GAIN_MIN 0x1
1083 #define DA7218_MIXOUT_AMP_GAIN_MAX 0x3
1085 /* DA7218_MIXOUT_R_CTRL = 0xCE */
1086 #define DA7218_MIXOUT_R_AMP_EN_SHIFT 7
1087 #define DA7218_MIXOUT_R_AMP_EN_MASK (0x1 << 7)
1089 /* DA7218_MIXOUT_R_GAIN = 0xCF */
1090 #define DA7218_MIXOUT_R_AMP_GAIN_SHIFT 0
1091 #define DA7218_MIXOUT_R_AMP_GAIN_MASK (0x3 << 0)
1093 /* DA7218_HP_L_CTRL = 0xD0 */
1094 #define DA7218_HP_L_AMP_MIN_GAIN_EN_SHIFT 2
1095 #define DA7218_HP_L_AMP_MIN_GAIN_EN_MASK (0x1 << 2)
1096 #define DA7218_HP_L_AMP_OE_SHIFT 3
1097 #define DA7218_HP_L_AMP_OE_MASK (0x1 << 3)
1098 #define DA7218_HP_L_AMP_ZC_EN_SHIFT 4
1099 #define DA7218_HP_L_AMP_ZC_EN_MASK (0x1 << 4)
1100 #define DA7218_HP_L_AMP_RAMP_EN_SHIFT 5
1101 #define DA7218_HP_L_AMP_RAMP_EN_MASK (0x1 << 5)
1102 #define DA7218_HP_L_AMP_MUTE_EN_SHIFT 6
1103 #define DA7218_HP_L_AMP_MUTE_EN_MASK (0x1 << 6)
1104 #define DA7218_HP_L_AMP_EN_SHIFT 7
1105 #define DA7218_HP_L_AMP_EN_MASK (0x1 << 7)
1106 #define DA7218_HP_AMP_OE_MASK (0x1 << 3)
1108 /* DA7218_HP_L_GAIN = 0xD1 */
1109 #define DA7218_HP_L_AMP_GAIN_SHIFT 0
1110 #define DA7218_HP_L_AMP_GAIN_MASK (0x3F << 0)
1111 #define DA7218_HP_AMP_GAIN_MIN 0x15
1112 #define DA7218_HP_AMP_GAIN_MAX 0x3F
1114 /* DA7218_HP_R_CTRL = 0xD2 */
1115 #define DA7218_HP_R_AMP_MIN_GAIN_EN_SHIFT 2
1116 #define DA7218_HP_R_AMP_MIN_GAIN_EN_MASK (0x1 << 2)
1117 #define DA7218_HP_R_AMP_OE_SHIFT 3
1118 #define DA7218_HP_R_AMP_OE_MASK (0x1 << 3)
1119 #define DA7218_HP_R_AMP_ZC_EN_SHIFT 4
1120 #define DA7218_HP_R_AMP_ZC_EN_MASK (0x1 << 4)
1121 #define DA7218_HP_R_AMP_RAMP_EN_SHIFT 5
1122 #define DA7218_HP_R_AMP_RAMP_EN_MASK (0x1 << 5)
1123 #define DA7218_HP_R_AMP_MUTE_EN_SHIFT 6
1124 #define DA7218_HP_R_AMP_MUTE_EN_MASK (0x1 << 6)
1125 #define DA7218_HP_R_AMP_EN_SHIFT 7
1126 #define DA7218_HP_R_AMP_EN_MASK (0x1 << 7)
1128 /* DA7218_HP_R_GAIN = 0xD3 */
1129 #define DA7218_HP_R_AMP_GAIN_SHIFT 0
1130 #define DA7218_HP_R_AMP_GAIN_MASK (0x3F << 0)
1132 /* DA7218_HP_SNGL_CTRL = 0xD4 */
1133 #define DA7218_HP_AMP_STEREO_DETECT_STATUS_SHIFT 0
1134 #define DA7218_HP_AMP_STEREO_DETECT_STATUS_MASK (0x1 << 0)
1135 #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_SHIFT 1
1136 #define DA7218_HPL_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 1)
1137 #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_SHIFT 2
1138 #define DA7218_HPR_AMP_LOAD_DETECT_STATUS_MASK (0x1 << 2)
1139 #define DA7218_HP_AMP_LOAD_DETECT_EN_SHIFT 6
1140 #define DA7218_HP_AMP_LOAD_DETECT_EN_MASK (0x1 << 6)
1141 #define DA7218_HP_AMP_STEREO_DETECT_EN_SHIFT 7
1142 #define DA7218_HP_AMP_STEREO_DETECT_EN_MASK (0x1 << 7)
1144 /* DA7218_HP_DIFF_CTRL = 0xD5 */
1145 #define DA7218_HP_AMP_DIFF_MODE_EN_SHIFT 0
1146 #define DA7218_HP_AMP_DIFF_MODE_EN_MASK (0x1 << 0)
1147 #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_SHIFT 4
1148 #define DA7218_HP_AMP_SINGLE_SUPPLY_EN_MASK (0x1 << 4)
1150 /* DA7218_HP_DIFF_UNLOCK = 0xD7 */
1151 #define DA7218_HP_DIFF_UNLOCK_SHIFT 0
1152 #define DA7218_HP_DIFF_UNLOCK_MASK (0x1 << 0)
1153 #define DA7218_HP_DIFF_UNLOCK_VAL 0xC3
1155 /* DA7218_HPLDET_JACK = 0xD8 */
1156 #define DA7218_HPLDET_JACK_RATE_SHIFT 0
1157 #define DA7218_HPLDET_JACK_RATE_MASK (0x7 << 0)
1158 #define DA7218_HPLDET_JACK_DEBOUNCE_SHIFT 3
1159 #define DA7218_HPLDET_JACK_DEBOUNCE_MASK (0x3 << 3)
1160 #define DA7218_HPLDET_JACK_THR_SHIFT 5
1161 #define DA7218_HPLDET_JACK_THR_MASK (0x3 << 5)
1162 #define DA7218_HPLDET_JACK_EN_SHIFT 7
1163 #define DA7218_HPLDET_JACK_EN_MASK (0x1 << 7)
1165 /* DA7218_HPLDET_CTRL = 0xD9 */
1166 #define DA7218_HPLDET_COMP_INV_SHIFT 0
1167 #define DA7218_HPLDET_COMP_INV_MASK (0x1 << 0)
1168 #define DA7218_HPLDET_HYST_EN_SHIFT 1
1169 #define DA7218_HPLDET_HYST_EN_MASK (0x1 << 1)
1170 #define DA7218_HPLDET_DISCHARGE_EN_SHIFT 7
1171 #define DA7218_HPLDET_DISCHARGE_EN_MASK (0x1 << 7)
1173 /* DA7218_HPLDET_TEST = 0xDA */
1174 #define DA7218_HPLDET_COMP_STS_SHIFT 4
1175 #define DA7218_HPLDET_COMP_STS_MASK (0x1 << 4)
1177 /* DA7218_REFERENCES = 0xDC */
1178 #define DA7218_BIAS_EN_SHIFT 3
1179 #define DA7218_BIAS_EN_MASK (0x1 << 3)
1181 /* DA7218_IO_CTRL = 0xE0 */
1182 #define DA7218_IO_VOLTAGE_LEVEL_SHIFT 0
1183 #define DA7218_IO_VOLTAGE_LEVEL_MASK (0x1 << 0)
1184 #define DA7218_IO_VOLTAGE_LEVEL_2_5V_3_6V 0
1185 #define DA7218_IO_VOLTAGE_LEVEL_1_5V_2_5V 1
1187 /* DA7218_LDO_CTRL = 0xE1 */
1188 #define DA7218_LDO_LEVEL_SELECT_SHIFT 4
1189 #define DA7218_LDO_LEVEL_SELECT_MASK (0x3 << 4)
1190 #define DA7218_LDO_EN_SHIFT 7
1191 #define DA7218_LDO_EN_MASK (0x1 << 7)
1193 /* DA7218_SIDETONE_CTRL = 0xE4 */
1194 #define DA7218_SIDETONE_MUTE_EN_SHIFT 6
1195 #define DA7218_SIDETONE_MUTE_EN_MASK (0x1 << 6)
1196 #define DA7218_SIDETONE_FILTER_EN_SHIFT 7
1197 #define DA7218_SIDETONE_FILTER_EN_MASK (0x1 << 7)
1199 /* DA7218_SIDETONE_IN_SELECT = 0xE5 */
1200 #define DA7218_SIDETONE_IN_SELECT_SHIFT 0
1201 #define DA7218_SIDETONE_IN_SELECT_MASK (0x3 << 0)
1202 #define DA7218_SIDETONE_IN_SELECT_MAX 4
1204 /* DA7218_SIDETONE_GAIN = 0xE6 */
1205 #define DA7218_SIDETONE_GAIN_SHIFT 0
1206 #define DA7218_SIDETONE_GAIN_MASK (0x1F << 0)
1208 /* DA7218_DROUTING_ST_OUTFILT_1L = 0xE8 */
1209 #define DA7218_OUTFILT_ST_1L_SRC_SHIFT 0
1210 #define DA7218_OUTFILT_ST_1L_SRC_MASK (0x7 << 0)
1211 #define DA7218_DMIX_ST_SRC_OUTFILT1L 0
1212 #define DA7218_DMIX_ST_SRC_OUTFILT1R 1
1213 #define DA7218_DMIX_ST_SRC_SIDETONE 2
1215 /* DA7218_DROUTING_ST_OUTFILT_1R = 0xE9 */
1216 #define DA7218_OUTFILT_ST_1R_SRC_SHIFT 0
1217 #define DA7218_OUTFILT_ST_1R_SRC_MASK (0x7 << 0)
1219 /* DA7218_SIDETONE_BIQ_3STAGE_DATA = 0xEA */
1220 #define DA7218_SIDETONE_BIQ_3STAGE_DATA_SHIFT 0
1221 #define DA7218_SIDETONE_BIQ_3STAGE_DATA_MASK (0xFF << 0)
1223 /* DA7218_SIDETONE_BIQ_3STAGE_ADDR = 0xEB */
1224 #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_SHIFT 0
1225 #define DA7218_SIDETONE_BIQ_3STAGE_ADDR_MASK (0x1F << 0)
1226 #define DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE 30
1228 /* DA7218_EVENT_STATUS = 0xEC */
1229 #define DA7218_HPLDET_JACK_STS_SHIFT 7
1230 #define DA7218_HPLDET_JACK_STS_MASK (0x1 << 7)
1232 /* DA7218_EVENT = 0xED */
1233 #define DA7218_LVL_DET_EVENT_SHIFT 0
1234 #define DA7218_LVL_DET_EVENT_MASK (0x1 << 0)
1235 #define DA7218_HPLDET_JACK_EVENT_SHIFT 7
1236 #define DA7218_HPLDET_JACK_EVENT_MASK (0x1 << 7)
1238 /* DA7218_EVENT_MASK = 0xEE */
1239 #define DA7218_LVL_DET_EVENT_MSK_SHIFT 0
1240 #define DA7218_LVL_DET_EVENT_MSK_MASK (0x1 << 0)
1241 #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_SHIFT 7
1242 #define DA7218_HPLDET_JACK_EVENT_IRQ_MSK_MASK (0x1 << 7)
1244 /* DA7218_DMIC_1_CTRL = 0xF0 */
1245 #define DA7218_DMIC_1_DATA_SEL_SHIFT 0
1246 #define DA7218_DMIC_1_DATA_SEL_MASK (0x1 << 0)
1247 #define DA7218_DMIC_1_SAMPLEPHASE_SHIFT 1
1248 #define DA7218_DMIC_1_SAMPLEPHASE_MASK (0x1 << 1)
1249 #define DA7218_DMIC_1_CLK_RATE_SHIFT 2
1250 #define DA7218_DMIC_1_CLK_RATE_MASK (0x1 << 2)
1251 #define DA7218_DMIC_1L_EN_SHIFT 6
1252 #define DA7218_DMIC_1L_EN_MASK (0x1 << 6)
1253 #define DA7218_DMIC_1R_EN_SHIFT 7
1254 #define DA7218_DMIC_1R_EN_MASK (0x1 << 7)
1256 /* DA7218_DMIC_2_CTRL = 0xF1 */
1257 #define DA7218_DMIC_2_DATA_SEL_SHIFT 0
1258 #define DA7218_DMIC_2_DATA_SEL_MASK (0x1 << 0)
1259 #define DA7218_DMIC_2_SAMPLEPHASE_SHIFT 1
1260 #define DA7218_DMIC_2_SAMPLEPHASE_MASK (0x1 << 1)
1261 #define DA7218_DMIC_2_CLK_RATE_SHIFT 2
1262 #define DA7218_DMIC_2_CLK_RATE_MASK (0x1 << 2)
1263 #define DA7218_DMIC_2L_EN_SHIFT 6
1264 #define DA7218_DMIC_2L_EN_MASK (0x1 << 6)
1265 #define DA7218_DMIC_2R_EN_SHIFT 7
1266 #define DA7218_DMIC_2R_EN_MASK (0x1 << 7)
1268 /* DA7218_IN_1L_GAIN = 0xF4 */
1269 #define DA7218_IN_1L_DIGITAL_GAIN_SHIFT 0
1270 #define DA7218_IN_1L_DIGITAL_GAIN_MASK (0x7F << 0)
1271 #define DA7218_IN_DIGITAL_GAIN_MAX 0x7F
1273 /* DA7218_IN_1R_GAIN = 0xF5 */
1274 #define DA7218_IN_1R_DIGITAL_GAIN_SHIFT 0
1275 #define DA7218_IN_1R_DIGITAL_GAIN_MASK (0x7F << 0)
1277 /* DA7218_IN_2L_GAIN = 0xF6 */
1278 #define DA7218_IN_2L_DIGITAL_GAIN_SHIFT 0
1279 #define DA7218_IN_2L_DIGITAL_GAIN_MASK (0x7F << 0)
1281 /* DA7218_IN_2R_GAIN = 0xF7 */
1282 #define DA7218_IN_2R_DIGITAL_GAIN_SHIFT 0
1283 #define DA7218_IN_2R_DIGITAL_GAIN_MASK (0x7F << 0)
1285 /* DA7218_OUT_1L_GAIN = 0xF8 */
1286 #define DA7218_OUT_1L_DIGITAL_GAIN_SHIFT 0
1287 #define DA7218_OUT_1L_DIGITAL_GAIN_MASK (0xFF << 0)
1288 #define DA7218_OUT_DIGITAL_GAIN_MIN 0x0
1289 #define DA7218_OUT_DIGITAL_GAIN_MAX 0x97
1291 /* DA7218_OUT_1R_GAIN = 0xF9 */
1292 #define DA7218_OUT_1R_DIGITAL_GAIN_SHIFT 0
1293 #define DA7218_OUT_1R_DIGITAL_GAIN_MASK (0xFF << 0)
1295 /* DA7218_MICBIAS_CTRL = 0xFC */
1296 #define DA7218_MICBIAS_1_LEVEL_SHIFT 0
1297 #define DA7218_MICBIAS_1_LEVEL_MASK (0x7 << 0)
1298 #define DA7218_MICBIAS_1_LP_MODE_SHIFT 3
1299 #define DA7218_MICBIAS_1_LP_MODE_MASK (0x1 << 3)
1300 #define DA7218_MICBIAS_2_LEVEL_SHIFT 4
1301 #define DA7218_MICBIAS_2_LEVEL_MASK (0x7 << 4)
1302 #define DA7218_MICBIAS_2_LP_MODE_SHIFT 7
1303 #define DA7218_MICBIAS_2_LP_MODE_MASK (0x1 << 7)
1305 /* DA7218_MICBIAS_EN = 0xFD */
1306 #define DA7218_MICBIAS_1_EN_SHIFT 0
1307 #define DA7218_MICBIAS_1_EN_MASK (0x1 << 0)
1308 #define DA7218_MICBIAS_2_EN_SHIFT 4
1309 #define DA7218_MICBIAS_2_EN_MASK (0x1 << 4)
1313 * General defines & data
1316 /* Register inversion */
1317 #define DA7218_NO_INVERT 0
1318 #define DA7218_INVERT 1
1320 /* Byte related defines */
1321 #define DA7218_BYTE_SHIFT 8
1322 #define DA7218_BYTE_MASK 0xFF
1323 #define DA7218_2BYTE_SHIFT 16
1324 #define DA7218_2BYTE_MASK 0xFFFF
1326 /* PLL Output Frequencies */
1327 #define DA7218_PLL_FREQ_OUT_90316 90316800
1328 #define DA7218_PLL_FREQ_OUT_98304 98304000
1330 /* PLL Frequency Dividers */
1331 #define DA7218_PLL_INDIV_2_TO_4_5_MHZ_VAL 1
1332 #define DA7218_PLL_INDIV_4_5_TO_9_MHZ_VAL 2
1333 #define DA7218_PLL_INDIV_9_TO_18_MHZ_VAL 4
1334 #define DA7218_PLL_INDIV_18_TO_36_MHZ_VAL 8
1335 #define DA7218_PLL_INDIV_36_TO_54_MHZ_VAL 16
1337 /* ALC Calibration */
1338 #define DA7218_ALC_CALIB_DELAY_MIN 2500
1339 #define DA7218_ALC_CALIB_DELAY_MAX 5000
1340 #define DA7218_ALC_CALIB_MAX_TRIES 5
1342 /* Ref Oscillator */
1343 #define DA7218_REF_OSC_CHECK_DELAY_MIN 5000
1344 #define DA7218_REF_OSC_CHECK_DELAY_MAX 10000
1345 #define DA7218_REF_OSC_CHECK_TRIES 4
1347 /* SRM */
1348 #define DA7218_SRM_CHECK_DELAY 50
1349 #define DA7218_SRM_CHECK_TRIES 8
1351 /* Mic Level Detect */
1352 #define DA7218_MIC_LVL_DET_DELAY 50
1354 enum da7218_biq_cfg {
1355 DA7218_BIQ_CFG_DATA = 0,
1356 DA7218_BIQ_CFG_ADDR,
1357 DA7218_BIQ_CFG_SIZE,
1360 enum da7218_clk_src {
1361 DA7218_CLKSRC_MCLK = 0,
1362 DA7218_CLKSRC_MCLK_SQR,
1365 enum da7218_sys_clk {
1366 DA7218_SYSCLK_MCLK = 0,
1367 DA7218_SYSCLK_PLL,
1368 DA7218_SYSCLK_PLL_SRM,
1371 enum da7218_dev_id {
1372 DA7217_DEV_ID = 0,
1373 DA7218_DEV_ID,
1376 /* Regulators */
1377 enum da7218_supplies {
1378 DA7218_SUPPLY_VDD = 0,
1379 DA7218_SUPPLY_VDDMIC,
1380 DA7218_SUPPLY_VDDIO,
1381 DA7218_NUM_SUPPLIES,
1384 /* Private data */
1385 struct da7218_priv {
1386 struct da7218_pdata *pdata;
1388 struct regulator_bulk_data supplies[DA7218_NUM_SUPPLIES];
1389 struct regmap *regmap;
1390 int dev_id;
1392 struct snd_soc_jack *jack;
1393 int irq;
1395 struct clk *mclk;
1396 unsigned int mclk_rate;
1398 bool hp_single_supply;
1399 bool master;
1400 u8 alc_en;
1401 u8 in_filt_en;
1402 u8 mic_lvl_det_en;
1404 u8 biq_5stage_coeff[DA7218_OUT_1_BIQ_5STAGE_CFG_SIZE];
1405 u8 stbiq_3stage_coeff[DA7218_SIDETONE_BIQ_3STAGE_CFG_SIZE];
1408 /* HP detect control */
1409 int da7218_hpldet(struct snd_soc_component *component, struct snd_soc_jack *jack);
1411 #endif /* _DA7218_H */