ARM: dts: omap5: Add bus_dma_limit for L3 bus
[linux/fpc-iii.git] / sound / soc / codecs / wm8750.h
blob325f58aa731686d8914f41556729fd4a5a5a6ccc
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3 * Copyright 2005 Openedhand Ltd.
5 * Author: Richard Purdie <richard@openedhand.com>
7 * Based on WM8753.h
8 */
10 #ifndef _WM8750_H
11 #define _WM8750_H
13 /* WM8750 register space */
15 #define WM8750_LINVOL 0x00
16 #define WM8750_RINVOL 0x01
17 #define WM8750_LOUT1V 0x02
18 #define WM8750_ROUT1V 0x03
19 #define WM8750_ADCDAC 0x05
20 #define WM8750_IFACE 0x07
21 #define WM8750_SRATE 0x08
22 #define WM8750_LDAC 0x0a
23 #define WM8750_RDAC 0x0b
24 #define WM8750_BASS 0x0c
25 #define WM8750_TREBLE 0x0d
26 #define WM8750_RESET 0x0f
27 #define WM8750_3D 0x10
28 #define WM8750_ALC1 0x11
29 #define WM8750_ALC2 0x12
30 #define WM8750_ALC3 0x13
31 #define WM8750_NGATE 0x14
32 #define WM8750_LADC 0x15
33 #define WM8750_RADC 0x16
34 #define WM8750_ADCTL1 0x17
35 #define WM8750_ADCTL2 0x18
36 #define WM8750_PWR1 0x19
37 #define WM8750_PWR2 0x1a
38 #define WM8750_ADCTL3 0x1b
39 #define WM8750_ADCIN 0x1f
40 #define WM8750_LADCIN 0x20
41 #define WM8750_RADCIN 0x21
42 #define WM8750_LOUTM1 0x22
43 #define WM8750_LOUTM2 0x23
44 #define WM8750_ROUTM1 0x24
45 #define WM8750_ROUTM2 0x25
46 #define WM8750_MOUTM1 0x26
47 #define WM8750_MOUTM2 0x27
48 #define WM8750_LOUT2V 0x28
49 #define WM8750_ROUT2V 0x29
50 #define WM8750_MOUTV 0x2a
52 #define WM8750_CACHE_REGNUM 0x2a
54 #define WM8750_SYSCLK 0
56 #endif