2 * Copyright (C) STMicroelectronics SA 2014
3 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
4 * License terms: GNU General Public License (GPL), version 2
10 #include <linux/platform_device.h>
14 #define HDMI_STA 0x0010
15 #define HDMI_STA_DLL_LCK BIT(5)
17 #define HDMI_STA_HOT_PLUG_SHIFT 4
18 #define HDMI_STA_HOT_PLUG (1 << HDMI_STA_HOT_PLUG_SHIFT)
23 bool (*start
)(struct sti_hdmi
*hdmi
);
24 void (*stop
)(struct sti_hdmi
*hdmi
);
31 * @drm_dev: pointer to drm device
32 * @mode: current display mode selected
33 * @regs: hdmi register
34 * @syscfg: syscfg register for pll rejection configuration
35 * @clk_pix: hdmi pixel clock
36 * @clk_tmds: hdmi tmds clock
37 * @clk_phy: hdmi phy clock
38 * @clk_audio: hdmi audio clock
39 * @irq: hdmi interrupt number
40 * @irq_status: interrupt status register
41 * @phy_ops: phy start/stop operations
42 * @enabled: true if hdmi is enabled else false
43 * @hpd: hot plug detect status
44 * @wait_event: wait event
45 * @event_received: wait event status
46 * @reset: reset control of the hdmi phy
50 struct drm_device
*drm_dev
;
51 struct drm_display_mode mode
;
57 struct clk
*clk_audio
;
60 struct hdmi_phy_ops
*phy_ops
;
63 wait_queue_head_t wait_event
;
65 struct reset_control
*reset
;
66 struct i2c_adapter
*ddc_adapt
;
69 u32
hdmi_read(struct sti_hdmi
*hdmi
, int offset
);
70 void hdmi_write(struct sti_hdmi
*hdmi
, u32 val
, int offset
);
73 * hdmi phy config structure
75 * A pointer to an array of these structures is passed to a TMDS (HDMI) output
76 * via the control interface to provide board and SoC specific
77 * configurations of the HDMI PHY. Each entry in the array specifies a hardware
78 * specific configuration for a given TMDS clock frequency range.
80 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
81 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
82 * @config: SoC specific register configuration
84 struct hdmi_phy_config
{