sched/deadline: Don't balance during wakeup if wakee is pinned
[linux/fpc-iii.git] / drivers / misc / ioc4.c
blob3336ddca45acc7e775794e4b239d2da113f354ef
1 /*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
6 * Copyright (C) 2005-2006 Silicon Graphics, Inc. All Rights Reserved.
7 */
9 /* This file contains the master driver module for use by SGI IOC4 subdrivers.
11 * It allocates any resources shared between multiple subdevices, and
12 * provides accessor functions (where needed) and the like for those
13 * resources. It also provides a mechanism for the subdevice modules
14 * to support loading and unloading.
16 * Non-shared resources (e.g. external interrupt A_INT_OUT register page
17 * alias, serial port and UART registers) are handled by the subdevice
18 * modules themselves.
20 * This is all necessary because IOC4 is not implemented as a multi-function
21 * PCI device, but an amalgamation of disparate registers for several
22 * types of device (ATA, serial, external interrupts). The normal
23 * resource management in the kernel doesn't have quite the right interfaces
24 * to handle this situation (e.g. multiple modules can't claim the same
25 * PCI ID), thus this IOC4 master module.
28 #include <linux/errno.h>
29 #include <linux/module.h>
30 #include <linux/pci.h>
31 #include <linux/ioc4.h>
32 #include <linux/ktime.h>
33 #include <linux/slab.h>
34 #include <linux/mutex.h>
35 #include <linux/time.h>
36 #include <asm/io.h>
38 /***************
39 * Definitions *
40 ***************/
42 /* Tweakable values */
44 /* PCI bus speed detection/calibration */
45 #define IOC4_CALIBRATE_COUNT 63 /* Calibration cycle period */
46 #define IOC4_CALIBRATE_CYCLES 256 /* Average over this many cycles */
47 #define IOC4_CALIBRATE_DISCARD 2 /* Discard first few cycles */
48 #define IOC4_CALIBRATE_LOW_MHZ 25 /* Lower bound on bus speed sanity */
49 #define IOC4_CALIBRATE_HIGH_MHZ 75 /* Upper bound on bus speed sanity */
50 #define IOC4_CALIBRATE_DEFAULT_MHZ 66 /* Assumed if sanity check fails */
52 /************************
53 * Submodule management *
54 ************************/
56 static DEFINE_MUTEX(ioc4_mutex);
58 static LIST_HEAD(ioc4_devices);
59 static LIST_HEAD(ioc4_submodules);
61 /* Register an IOC4 submodule */
62 int
63 ioc4_register_submodule(struct ioc4_submodule *is)
65 struct ioc4_driver_data *idd;
67 mutex_lock(&ioc4_mutex);
68 list_add(&is->is_list, &ioc4_submodules);
70 /* Initialize submodule for each IOC4 */
71 if (!is->is_probe)
72 goto out;
74 list_for_each_entry(idd, &ioc4_devices, idd_list) {
75 if (is->is_probe(idd)) {
76 printk(KERN_WARNING
77 "%s: IOC4 submodule %s probe failed "
78 "for pci_dev %s",
79 __func__, module_name(is->is_owner),
80 pci_name(idd->idd_pdev));
83 out:
84 mutex_unlock(&ioc4_mutex);
85 return 0;
88 /* Unregister an IOC4 submodule */
89 void
90 ioc4_unregister_submodule(struct ioc4_submodule *is)
92 struct ioc4_driver_data *idd;
94 mutex_lock(&ioc4_mutex);
95 list_del(&is->is_list);
97 /* Remove submodule for each IOC4 */
98 if (!is->is_remove)
99 goto out;
101 list_for_each_entry(idd, &ioc4_devices, idd_list) {
102 if (is->is_remove(idd)) {
103 printk(KERN_WARNING
104 "%s: IOC4 submodule %s remove failed "
105 "for pci_dev %s.\n",
106 __func__, module_name(is->is_owner),
107 pci_name(idd->idd_pdev));
110 out:
111 mutex_unlock(&ioc4_mutex);
114 /*********************
115 * Device management *
116 *********************/
118 #define IOC4_CALIBRATE_LOW_LIMIT \
119 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_LOW_MHZ)
120 #define IOC4_CALIBRATE_HIGH_LIMIT \
121 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_HIGH_MHZ)
122 #define IOC4_CALIBRATE_DEFAULT \
123 (1000*IOC4_EXTINT_COUNT_DIVISOR/IOC4_CALIBRATE_DEFAULT_MHZ)
125 #define IOC4_CALIBRATE_END \
126 (IOC4_CALIBRATE_CYCLES + IOC4_CALIBRATE_DISCARD)
128 #define IOC4_INT_OUT_MODE_TOGGLE 0x7 /* Toggle INT_OUT every COUNT+1 ticks */
130 /* Determines external interrupt output clock period of the PCI bus an
131 * IOC4 is attached to. This value can be used to determine the PCI
132 * bus speed.
134 * IOC4 has a design feature that various internal timers are derived from
135 * the PCI bus clock. This causes IOC4 device drivers to need to take the
136 * bus speed into account when setting various register values (e.g. INT_OUT
137 * register COUNT field, UART divisors, etc). Since this information is
138 * needed by several subdrivers, it is determined by the main IOC4 driver,
139 * even though the following code utilizes external interrupt registers
140 * to perform the speed calculation.
142 static void
143 ioc4_clock_calibrate(struct ioc4_driver_data *idd)
145 union ioc4_int_out int_out;
146 union ioc4_gpcr gpcr;
147 unsigned int state, last_state = 1;
148 uint64_t start, end, period;
149 unsigned int count = 0;
151 /* Enable output */
152 gpcr.raw = 0;
153 gpcr.fields.dir = IOC4_GPCR_DIR_0;
154 gpcr.fields.int_out_en = 1;
155 writel(gpcr.raw, &idd->idd_misc_regs->gpcr_s.raw);
157 /* Reset to power-on state */
158 writel(0, &idd->idd_misc_regs->int_out.raw);
159 mmiowb();
161 /* Set up square wave */
162 int_out.raw = 0;
163 int_out.fields.count = IOC4_CALIBRATE_COUNT;
164 int_out.fields.mode = IOC4_INT_OUT_MODE_TOGGLE;
165 int_out.fields.diag = 0;
166 writel(int_out.raw, &idd->idd_misc_regs->int_out.raw);
167 mmiowb();
169 /* Check square wave period averaged over some number of cycles */
170 do {
171 int_out.raw = readl(&idd->idd_misc_regs->int_out.raw);
172 state = int_out.fields.int_out;
173 if (!last_state && state) {
174 count++;
175 if (count == IOC4_CALIBRATE_END) {
176 end = ktime_get_ns();
177 break;
178 } else if (count == IOC4_CALIBRATE_DISCARD)
179 start = ktime_get_ns();
181 last_state = state;
182 } while (1);
184 /* Calculation rearranged to preserve intermediate precision.
185 * Logically:
186 * 1. "end - start" gives us the measurement period over all
187 * the square wave cycles.
188 * 2. Divide by number of square wave cycles to get the period
189 * of a square wave cycle.
190 * 3. Divide by 2*(int_out.fields.count+1), which is the formula
191 * by which the IOC4 generates the square wave, to get the
192 * period of an IOC4 INT_OUT count.
194 period = (end - start) /
195 (IOC4_CALIBRATE_CYCLES * 2 * (IOC4_CALIBRATE_COUNT + 1));
197 /* Bounds check the result. */
198 if (period > IOC4_CALIBRATE_LOW_LIMIT ||
199 period < IOC4_CALIBRATE_HIGH_LIMIT) {
200 printk(KERN_INFO
201 "IOC4 %s: Clock calibration failed. Assuming"
202 "PCI clock is %d ns.\n",
203 pci_name(idd->idd_pdev),
204 IOC4_CALIBRATE_DEFAULT / IOC4_EXTINT_COUNT_DIVISOR);
205 period = IOC4_CALIBRATE_DEFAULT;
206 } else {
207 u64 ns = period;
209 do_div(ns, IOC4_EXTINT_COUNT_DIVISOR);
210 printk(KERN_DEBUG
211 "IOC4 %s: PCI clock is %llu ns.\n",
212 pci_name(idd->idd_pdev), (unsigned long long)ns);
215 /* Remember results. We store the extint clock period rather
216 * than the PCI clock period so that greater precision is
217 * retained. Divide by IOC4_EXTINT_COUNT_DIVISOR to get
218 * PCI clock period.
220 idd->count_period = period;
223 /* There are three variants of IOC4 cards: IO9, IO10, and PCI-RT.
224 * Each brings out different combinations of IOC4 signals, thus.
225 * the IOC4 subdrivers need to know to which we're attached.
227 * We look for the presence of a SCSI (IO9) or SATA (IO10) controller
228 * on the same PCI bus at slot number 3 to differentiate IO9 from IO10.
229 * If neither is present, it's a PCI-RT.
231 static unsigned int
232 ioc4_variant(struct ioc4_driver_data *idd)
234 struct pci_dev *pdev = NULL;
235 int found = 0;
237 /* IO9: Look for a QLogic ISP 12160 at the same bus and slot 3. */
238 do {
239 pdev = pci_get_device(PCI_VENDOR_ID_QLOGIC,
240 PCI_DEVICE_ID_QLOGIC_ISP12160, pdev);
241 if (pdev &&
242 idd->idd_pdev->bus->number == pdev->bus->number &&
243 3 == PCI_SLOT(pdev->devfn))
244 found = 1;
245 } while (pdev && !found);
246 if (NULL != pdev) {
247 pci_dev_put(pdev);
248 return IOC4_VARIANT_IO9;
251 /* IO10: Look for a Vitesse VSC 7174 at the same bus and slot 3. */
252 pdev = NULL;
253 do {
254 pdev = pci_get_device(PCI_VENDOR_ID_VITESSE,
255 PCI_DEVICE_ID_VITESSE_VSC7174, pdev);
256 if (pdev &&
257 idd->idd_pdev->bus->number == pdev->bus->number &&
258 3 == PCI_SLOT(pdev->devfn))
259 found = 1;
260 } while (pdev && !found);
261 if (NULL != pdev) {
262 pci_dev_put(pdev);
263 return IOC4_VARIANT_IO10;
266 /* PCI-RT: No SCSI/SATA controller will be present */
267 return IOC4_VARIANT_PCI_RT;
270 static void
271 ioc4_load_modules(struct work_struct *work)
273 request_module("sgiioc4");
276 static DECLARE_WORK(ioc4_load_modules_work, ioc4_load_modules);
278 /* Adds a new instance of an IOC4 card */
279 static int
280 ioc4_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
282 struct ioc4_driver_data *idd;
283 struct ioc4_submodule *is;
284 uint32_t pcmd;
285 int ret;
287 /* Enable IOC4 and take ownership of it */
288 if ((ret = pci_enable_device(pdev))) {
289 printk(KERN_WARNING
290 "%s: Failed to enable IOC4 device for pci_dev %s.\n",
291 __func__, pci_name(pdev));
292 goto out;
294 pci_set_master(pdev);
296 /* Set up per-IOC4 data */
297 idd = kmalloc(sizeof(struct ioc4_driver_data), GFP_KERNEL);
298 if (!idd) {
299 printk(KERN_WARNING
300 "%s: Failed to allocate IOC4 data for pci_dev %s.\n",
301 __func__, pci_name(pdev));
302 ret = -ENODEV;
303 goto out_idd;
305 idd->idd_pdev = pdev;
306 idd->idd_pci_id = pci_id;
308 /* Map IOC4 misc registers. These are shared between subdevices
309 * so the main IOC4 module manages them.
311 idd->idd_bar0 = pci_resource_start(idd->idd_pdev, 0);
312 if (!idd->idd_bar0) {
313 printk(KERN_WARNING
314 "%s: Unable to find IOC4 misc resource "
315 "for pci_dev %s.\n",
316 __func__, pci_name(idd->idd_pdev));
317 ret = -ENODEV;
318 goto out_pci;
320 if (!request_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs),
321 "ioc4_misc")) {
322 printk(KERN_WARNING
323 "%s: Unable to request IOC4 misc region "
324 "for pci_dev %s.\n",
325 __func__, pci_name(idd->idd_pdev));
326 ret = -ENODEV;
327 goto out_pci;
329 idd->idd_misc_regs = ioremap(idd->idd_bar0,
330 sizeof(struct ioc4_misc_regs));
331 if (!idd->idd_misc_regs) {
332 printk(KERN_WARNING
333 "%s: Unable to remap IOC4 misc region "
334 "for pci_dev %s.\n",
335 __func__, pci_name(idd->idd_pdev));
336 ret = -ENODEV;
337 goto out_misc_region;
340 /* Failsafe portion of per-IOC4 initialization */
342 /* Detect card variant */
343 idd->idd_variant = ioc4_variant(idd);
344 printk(KERN_INFO "IOC4 %s: %s card detected.\n", pci_name(pdev),
345 idd->idd_variant == IOC4_VARIANT_IO9 ? "IO9" :
346 idd->idd_variant == IOC4_VARIANT_PCI_RT ? "PCI-RT" :
347 idd->idd_variant == IOC4_VARIANT_IO10 ? "IO10" : "unknown");
349 /* Initialize IOC4 */
350 pci_read_config_dword(idd->idd_pdev, PCI_COMMAND, &pcmd);
351 pci_write_config_dword(idd->idd_pdev, PCI_COMMAND,
352 pcmd | PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
354 /* Determine PCI clock */
355 ioc4_clock_calibrate(idd);
357 /* Disable/clear all interrupts. Need to do this here lest
358 * one submodule request the shared IOC4 IRQ, but interrupt
359 * is generated by a different subdevice.
361 /* Disable */
362 writel(~0, &idd->idd_misc_regs->other_iec.raw);
363 writel(~0, &idd->idd_misc_regs->sio_iec);
364 /* Clear (i.e. acknowledge) */
365 writel(~0, &idd->idd_misc_regs->other_ir.raw);
366 writel(~0, &idd->idd_misc_regs->sio_ir);
368 /* Track PCI-device specific data */
369 idd->idd_serial_data = NULL;
370 pci_set_drvdata(idd->idd_pdev, idd);
372 mutex_lock(&ioc4_mutex);
373 list_add_tail(&idd->idd_list, &ioc4_devices);
375 /* Add this IOC4 to all submodules */
376 list_for_each_entry(is, &ioc4_submodules, is_list) {
377 if (is->is_probe && is->is_probe(idd)) {
378 printk(KERN_WARNING
379 "%s: IOC4 submodule 0x%s probe failed "
380 "for pci_dev %s.\n",
381 __func__, module_name(is->is_owner),
382 pci_name(idd->idd_pdev));
385 mutex_unlock(&ioc4_mutex);
387 /* Request sgiioc4 IDE driver on boards that bring that functionality
388 * off of IOC4. The root filesystem may be hosted on a drive connected
389 * to IOC4, so we need to make sure the sgiioc4 driver is loaded as it
390 * won't be picked up by modprobes due to the ioc4 module owning the
391 * PCI device.
393 if (idd->idd_variant != IOC4_VARIANT_PCI_RT) {
394 /* Request the module from a work procedure as the modprobe
395 * goes out to a userland helper and that will hang if done
396 * directly from ioc4_probe().
398 printk(KERN_INFO "IOC4 loading sgiioc4 submodule\n");
399 schedule_work(&ioc4_load_modules_work);
402 return 0;
404 out_misc_region:
405 release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
406 out_pci:
407 kfree(idd);
408 out_idd:
409 pci_disable_device(pdev);
410 out:
411 return ret;
414 /* Removes a particular instance of an IOC4 card. */
415 static void
416 ioc4_remove(struct pci_dev *pdev)
418 struct ioc4_submodule *is;
419 struct ioc4_driver_data *idd;
421 idd = pci_get_drvdata(pdev);
423 /* Remove this IOC4 from all submodules */
424 mutex_lock(&ioc4_mutex);
425 list_for_each_entry(is, &ioc4_submodules, is_list) {
426 if (is->is_remove && is->is_remove(idd)) {
427 printk(KERN_WARNING
428 "%s: IOC4 submodule 0x%s remove failed "
429 "for pci_dev %s.\n",
430 __func__, module_name(is->is_owner),
431 pci_name(idd->idd_pdev));
434 mutex_unlock(&ioc4_mutex);
436 /* Release resources */
437 iounmap(idd->idd_misc_regs);
438 if (!idd->idd_bar0) {
439 printk(KERN_WARNING
440 "%s: Unable to get IOC4 misc mapping for pci_dev %s. "
441 "Device removal may be incomplete.\n",
442 __func__, pci_name(idd->idd_pdev));
444 release_mem_region(idd->idd_bar0, sizeof(struct ioc4_misc_regs));
446 /* Disable IOC4 and relinquish */
447 pci_disable_device(pdev);
449 /* Remove and free driver data */
450 mutex_lock(&ioc4_mutex);
451 list_del(&idd->idd_list);
452 mutex_unlock(&ioc4_mutex);
453 kfree(idd);
456 static struct pci_device_id ioc4_id_table[] = {
457 {PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_IOC4, PCI_ANY_ID,
458 PCI_ANY_ID, 0x0b4000, 0xFFFFFF},
462 static struct pci_driver ioc4_driver = {
463 .name = "IOC4",
464 .id_table = ioc4_id_table,
465 .probe = ioc4_probe,
466 .remove = ioc4_remove,
469 MODULE_DEVICE_TABLE(pci, ioc4_id_table);
471 /*********************
472 * Module management *
473 *********************/
475 /* Module load */
476 static int __init
477 ioc4_init(void)
479 return pci_register_driver(&ioc4_driver);
482 /* Module unload */
483 static void __exit
484 ioc4_exit(void)
486 /* Ensure ioc4_load_modules() has completed before exiting */
487 flush_work(&ioc4_load_modules_work);
488 pci_unregister_driver(&ioc4_driver);
491 module_init(ioc4_init);
492 module_exit(ioc4_exit);
494 MODULE_AUTHOR("Brent Casavant - Silicon Graphics, Inc. <bcasavan@sgi.com>");
495 MODULE_DESCRIPTION("PCI driver master module for SGI IOC4 Base-IO Card");
496 MODULE_LICENSE("GPL");
498 EXPORT_SYMBOL(ioc4_register_submodule);
499 EXPORT_SYMBOL(ioc4_unregister_submodule);