x86: improve UP kernel when CPU-hotplug and SMP is enabled
[linux/fpc-iii.git] / drivers / net / hamachi.c
blob3199526bcecbab3f879f9cd56507c570305a8c2f
1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 Written 1998-2000 by Donald Becker.
4 Updates 2000 by Keith Underwood.
6 This software may be used and distributed according to the terms of
7 the GNU General Public License (GPL), incorporated herein by reference.
8 Drivers based on or derived from this code fall under the GPL and must
9 retain the authorship, copyright and license notice. This file is not
10 a complete program and may only be used when the entire operating
11 system is licensed under the GPL.
13 The author may be reached as becker@scyld.com, or C/O
14 Scyld Computing Corporation
15 410 Severn Ave., Suite 210
16 Annapolis MD 21403
18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 adapter.
21 Support and updates available at
22 http://www.scyld.com/network/hamachi.html
23 [link no longer provides useful info -jgarzik]
25 http://www.parl.clemson.edu/~keithu/hamachi.html
29 #define DRV_NAME "hamachi"
30 #define DRV_VERSION "2.1"
31 #define DRV_RELDATE "Sept 11, 2006"
34 /* A few user-configurable values. */
36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44 * module, or through the rx_params and tx_params variables
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54 -Setting to > 1518 causes all frames to be copied
55 -Setting to 0 disables copies
57 static int rx_copybreak;
59 /* An override for the hardware detection of bus width.
60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit.
61 Add 2 to disable parity detection.
63 static int force32;
66 /* Used to pass the media type, etc.
67 These exist for driver interoperability.
68 No media types are currently defined.
69 - The lower 4 bits are reserved for the media type.
70 - The next three bits may be set to one of the following:
71 0x00000000 : Autodetect PCI bus
72 0x00000010 : Force 32 bit PCI bus
73 0x00000020 : Disable parity detection
74 0x00000040 : Force 64 bit PCI bus
75 Default is autodetect
76 - The next bit can be used to force half-duplex. This is a bad
77 idea since no known implementations implement half-duplex, and,
78 in general, half-duplex for gigabit ethernet is a bad idea.
79 0x00000080 : Force half-duplex
80 Default is full-duplex.
81 - In the original driver, the ninth bit could be used to force
82 full-duplex. Maintain that for compatibility
83 0x00000200 : Force full-duplex
85 #define MAX_UNITS 8 /* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89 * interruput management. Parameters will be loaded as specified into
90 * the TxIntControl and RxIntControl registers.
92 * The registers are arranged as follows:
93 * 23 - 16 15 - 8 7 - 0
94 * _________________________________
95 * | min_pkt | max_gap | max_latency |
96 * ---------------------------------
97 * min_pkt : The minimum number of packets processed between
98 * interrupts.
99 * max_gap : The maximum inter-packet gap in units of 8.192 us
100 * max_latency : The absolute time between interrupts in units of 8.192 us
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
106 /* Operational parameters that are set at compile time. */
108 /* Keep the ring sizes a power of two for compile efficiency.
109 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110 Making the Tx ring too large decreases the effectiveness of channel
111 bonding and packet priority.
112 There are no ill effects from too-large receive rings, except for
113 excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115 for these Gbit adapters or you get into an overrun condition really
116 easily. Also, things appear to work a bit better in back-to-back
117 configurations if the Rx ring is 8 times the size of the Tx ring
119 #define TX_RING_SIZE 64
120 #define RX_RING_SIZE 512
121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc)
125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment.
126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */
130 /* #define ADDRLEN 64 */
133 * RX_CHECKSUM turns on card-generated receive checksum generation for
134 * TCP and UDP packets. Otherwise the upper layers do the calculation.
135 * TX_CHECKSUM won't do anything too useful, even if it works. There's no
136 * easy mechanism by which to tell the TCP/UDP stack that it need not
137 * generate checksums for this device. But if somebody can find a way
138 * to get that to work, most of the card work is in here already.
139 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
141 #undef TX_CHECKSUM
142 #define RX_CHECKSUM
144 /* Operational parameters that usually are not changed. */
145 /* Time in jiffies before concluding the transmitter is hung. */
146 #define TX_TIMEOUT (5*HZ)
148 #include <linux/module.h>
149 #include <linux/kernel.h>
150 #include <linux/string.h>
151 #include <linux/timer.h>
152 #include <linux/time.h>
153 #include <linux/errno.h>
154 #include <linux/ioport.h>
155 #include <linux/slab.h>
156 #include <linux/interrupt.h>
157 #include <linux/pci.h>
158 #include <linux/init.h>
159 #include <linux/ethtool.h>
160 #include <linux/mii.h>
161 #include <linux/netdevice.h>
162 #include <linux/etherdevice.h>
163 #include <linux/skbuff.h>
164 #include <linux/ip.h>
165 #include <linux/delay.h>
166 #include <linux/bitops.h>
168 #include <asm/uaccess.h>
169 #include <asm/processor.h> /* Processor type for cache alignment. */
170 #include <asm/io.h>
171 #include <asm/unaligned.h>
172 #include <asm/cache.h>
174 static char version[] __devinitdata =
175 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n"
176 KERN_INFO " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
177 KERN_INFO " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
180 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
181 we need it for hardware checksumming support. FYI... some of
182 the definitions in <netinet/ip.h> conflict/duplicate those in
183 other linux headers causing many compiler warnings.
185 #ifndef IP_MF
186 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */
187 #endif
189 /* Define IP_OFFSET to be IPOPT_OFFSET */
190 #ifndef IP_OFFSET
191 #ifdef IPOPT_OFFSET
192 #define IP_OFFSET IPOPT_OFFSET
193 #else
194 #define IP_OFFSET 2
195 #endif
196 #endif
198 #define RUN_AT(x) (jiffies + (x))
200 #ifndef ADDRLEN
201 #define ADDRLEN 32
202 #endif
204 /* Condensed bus+endian portability operations. */
205 #if ADDRLEN == 64
206 #define cpu_to_leXX(addr) cpu_to_le64(addr)
207 #define leXX_to_cpu(addr) le64_to_cpu(addr)
208 #else
209 #define cpu_to_leXX(addr) cpu_to_le32(addr)
210 #define leXX_to_cpu(addr) le32_to_cpu(addr)
211 #endif
215 Theory of Operation
217 I. Board Compatibility
219 This device driver is designed for the Packet Engines "Hamachi"
220 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit
221 66Mhz PCI card.
223 II. Board-specific settings
225 No jumpers exist on the board. The chip supports software correction of
226 various motherboard wiring errors, however this driver does not support
227 that feature.
229 III. Driver operation
231 IIIa. Ring buffers
233 The Hamachi uses a typical descriptor based bus-master architecture.
234 The descriptor list is similar to that used by the Digital Tulip.
235 This driver uses two statically allocated fixed-size descriptor lists
236 formed into rings by a branch from the final descriptor to the beginning of
237 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
239 This driver uses a zero-copy receive and transmit scheme similar my other
240 network drivers.
241 The driver allocates full frame size skbuffs for the Rx ring buffers at
242 open() time and passes the skb->data field to the Hamachi as receive data
243 buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
244 a fresh skbuff is allocated and the frame is copied to the new skbuff.
245 When the incoming frame is larger, the skbuff is passed directly up the
246 protocol stack and replaced by a newly allocated skbuff.
248 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
249 using a full-sized skbuff for small frames vs. the copying costs of larger
250 frames. Gigabit cards are typically used on generously configured machines
251 and the underfilled buffers have negligible impact compared to the benefit of
252 a single allocation size, so the default value of zero results in never
253 copying packets.
255 IIIb/c. Transmit/Receive Structure
257 The Rx and Tx descriptor structure are straight-forward, with no historical
258 baggage that must be explained. Unlike the awkward DBDMA structure, there
259 are no unused fields or option bits that had only one allowable setting.
261 Two details should be noted about the descriptors: The chip supports both 32
262 bit and 64 bit address structures, and the length field is overwritten on
263 the receive descriptors. The descriptor length is set in the control word
264 for each channel. The development driver uses 32 bit addresses only, however
265 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
267 IIId. Synchronization
269 This driver is very similar to my other network drivers.
270 The driver runs as two independent, single-threaded flows of control. One
271 is the send-packet routine, which enforces single-threaded use by the
272 dev->tbusy flag. The other thread is the interrupt handler, which is single
273 threaded by the hardware and other software.
275 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
276 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next
277 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
278 the 'hmp->tx_full' flag.
280 The interrupt handler has exclusive control over the Rx ring and records stats
281 from the Tx ring. After reaping the stats, it marks the Tx queue entry as
282 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
283 clears both the tx_full and tbusy flags.
285 IV. Notes
287 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
289 IVb. References
291 Hamachi Engineering Design Specification, 5/15/97
292 (Note: This version was marked "Confidential".)
294 IVc. Errata
296 None noted.
298 V. Recent Changes
300 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears
301 to help avoid some stall conditions -- this needs further research.
303 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans
304 the Tx ring and is called from hamachi_start_xmit (this used to be
305 called from hamachi_interrupt but it tends to delay execution of the
306 interrupt handler and thus reduce bandwidth by reducing the latency
307 between hamachi_rx()'s). Notably, some modification has been made so
308 that the cleaning loop checks only to make sure that the DescOwn bit
309 isn't set in the status flag since the card is not required
310 to set the entire flag to zero after processing.
312 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
313 checked before attempting to add a buffer to the ring. If the ring is full
314 an attempt is made to free any dirty buffers and thus find space for
315 the new buffer or the function returns non-zero which should case the
316 scheduler to reschedule the buffer later.
318 01/15/1999 EPK Some adjustments were made to the chip initialization.
319 End-to-end flow control should now be fully active and the interrupt
320 algorithm vars have been changed. These could probably use further tuning.
322 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to
323 set the rx and tx latencies for the Hamachi interrupts. If you're having
324 problems with network stalls, try setting these to higher values.
325 Valid values are 0x00 through 0xff.
327 01/15/1999 EPK In general, the overall bandwidth has increased and
328 latencies are better (sometimes by a factor of 2). Stalls are rare at
329 this point, however there still appears to be a bug somewhere between the
330 hardware and driver. TCP checksum errors under load also appear to be
331 eliminated at this point.
333 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
334 Rx and Tx rings. This appears to have been affecting whether a particular
335 peer-to-peer connection would hang under high load. I believe the Rx
336 rings was typically getting set correctly, but the Tx ring wasn't getting
337 the DescEndRing bit set during initialization. ??? Does this mean the
338 hamachi card is using the DescEndRing in processing even if a particular
339 slot isn't in use -- hypothetically, the card might be searching the
340 entire Tx ring for slots with the DescOwn bit set and then processing
341 them. If the DescEndRing bit isn't set, then it might just wander off
342 through memory until it hits a chunk of data with that bit set
343 and then looping back.
345 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
346 problem (TxCmd and RxCmd need only to be set when idle or stopped.
348 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
349 (Michel Mueller pointed out the ``permanently busy'' potential
350 problem here).
352 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
354 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
355 incorrectly defined and corrected (as per Michel Mueller).
357 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
358 were available before reseting the tbusy and tx_full flags
359 (as per Michel Mueller).
361 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
363 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
364 32 bit.
366 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the
367 hamachi_start_xmit() and hamachi_interrupt() code. There is still some
368 re-structuring I would like to do.
370 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
371 parameters on a dual P3-450 setup yielded the new default interrupt
372 mitigation parameters. Tx should interrupt VERY infrequently due to
373 Eric's scheme. Rx should be more often...
375 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
376 nicely with non-linux machines.
378 03/13/2000 KDU Experimented with some of the configuration values:
380 -It seems that enabling PCI performance commands for descriptors
381 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
382 performance impact for any of my tests. (ttcp, netpipe, netperf) I will
383 leave them that way until I hear further feedback.
385 -Increasing the PCI_LATENCY_TIMER to 130
386 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
387 degrade performance. Leaving default at 64 pending further information.
389 03/14/2000 KDU Further tuning:
391 -adjusted boguscnt in hamachi_rx() to depend on interrupt
392 mitigation parameters chosen.
394 -Selected a set of interrupt parameters based on some extensive testing.
395 These may change with more testing.
397 TO DO:
399 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
400 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in
401 that case.
403 -fix the reset procedure. It doesn't quite work.
406 /* A few values that may be tweaked. */
407 /* Size of each temporary Rx buffer, calculated as:
408 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
409 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum +
410 * 2 more because we use skb_reserve.
412 #define PKT_BUF_SZ 1538
414 /* For now, this is going to be set to the maximum size of an ethernet
415 * packet. Eventually, we may want to make it a variable that is
416 * related to the MTU
418 #define MAX_FRAME_SIZE 1518
420 /* The rest of these values should never change. */
422 static void hamachi_timer(unsigned long data);
424 enum capability_flags {CanHaveMII=1, };
425 static const struct chip_info {
426 u16 vendor_id, device_id, device_id_mask, pad;
427 const char *name;
428 void (*media_timer)(unsigned long data);
429 int flags;
430 } chip_tbl[] = {
431 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
432 {0,},
435 /* Offsets to the Hamachi registers. Various sizes. */
436 enum hamachi_offsets {
437 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
438 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
439 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
440 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
441 TxChecksum=0x074, RxChecksum=0x076,
442 TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
443 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
444 EventStatus=0x08C,
445 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
446 /* See enum MII_offsets below. */
447 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
448 AddrMode=0x0D0, StationAddr=0x0D2,
449 /* Gigabit AutoNegotiation. */
450 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
451 ANLinkPartnerAbility=0x0EA,
452 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
453 FIFOcfg=0x0F8,
456 /* Offsets to the MII-mode registers. */
457 enum MII_offsets {
458 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
459 MII_Status=0xAE,
462 /* Bits in the interrupt status/mask registers. */
463 enum intr_status_bits {
464 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
465 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
466 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
468 /* The Hamachi Rx and Tx buffer descriptors. */
469 struct hamachi_desc {
470 __le32 status_n_length;
471 #if ADDRLEN == 64
472 u32 pad;
473 __le64 addr;
474 #else
475 __le32 addr;
476 #endif
479 /* Bits in hamachi_desc.status_n_length */
480 enum desc_status_bits {
481 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
482 DescIntr=0x10000000,
485 #define PRIV_ALIGN 15 /* Required alignment mask */
486 #define MII_CNT 4
487 struct hamachi_private {
488 /* Descriptor rings first for alignment. Tx requires a second descriptor
489 for status. */
490 struct hamachi_desc *rx_ring;
491 struct hamachi_desc *tx_ring;
492 struct sk_buff* rx_skbuff[RX_RING_SIZE];
493 struct sk_buff* tx_skbuff[TX_RING_SIZE];
494 dma_addr_t tx_ring_dma;
495 dma_addr_t rx_ring_dma;
496 struct net_device_stats stats;
497 struct timer_list timer; /* Media selection timer. */
498 /* Frequently used and paired value: keep adjacent for cache effect. */
499 spinlock_t lock;
500 int chip_id;
501 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */
502 unsigned int cur_tx, dirty_tx;
503 unsigned int rx_buf_sz; /* Based on MTU+slack. */
504 unsigned int tx_full:1; /* The Tx queue is full. */
505 unsigned int duplex_lock:1;
506 unsigned int default_port:4; /* Last dev->if_port value. */
507 /* MII transceiver section. */
508 int mii_cnt; /* MII device addresses. */
509 struct mii_if_info mii_if; /* MII lib hooks/info */
510 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */
511 u32 rx_int_var, tx_int_var; /* interrupt control variables */
512 u32 option; /* Hold on to a copy of the options */
513 struct pci_dev *pci_dev;
514 void __iomem *base;
517 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
518 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
519 MODULE_LICENSE("GPL");
521 module_param(max_interrupt_work, int, 0);
522 module_param(mtu, int, 0);
523 module_param(debug, int, 0);
524 module_param(min_rx_pkt, int, 0);
525 module_param(max_rx_gap, int, 0);
526 module_param(max_rx_latency, int, 0);
527 module_param(min_tx_pkt, int, 0);
528 module_param(max_tx_gap, int, 0);
529 module_param(max_tx_latency, int, 0);
530 module_param(rx_copybreak, int, 0);
531 module_param_array(rx_params, int, NULL, 0);
532 module_param_array(tx_params, int, NULL, 0);
533 module_param_array(options, int, NULL, 0);
534 module_param_array(full_duplex, int, NULL, 0);
535 module_param(force32, int, 0);
536 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
537 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
538 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
539 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
540 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
541 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
542 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
543 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
544 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
545 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
546 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
547 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
548 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
549 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
550 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
552 static int read_eeprom(void __iomem *ioaddr, int location);
553 static int mdio_read(struct net_device *dev, int phy_id, int location);
554 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
555 static int hamachi_open(struct net_device *dev);
556 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
557 static void hamachi_timer(unsigned long data);
558 static void hamachi_tx_timeout(struct net_device *dev);
559 static void hamachi_init_ring(struct net_device *dev);
560 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev);
561 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
562 static int hamachi_rx(struct net_device *dev);
563 static inline int hamachi_tx(struct net_device *dev);
564 static void hamachi_error(struct net_device *dev, int intr_status);
565 static int hamachi_close(struct net_device *dev);
566 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
567 static void set_rx_mode(struct net_device *dev);
568 static const struct ethtool_ops ethtool_ops;
569 static const struct ethtool_ops ethtool_ops_no_mii;
571 static int __devinit hamachi_init_one (struct pci_dev *pdev,
572 const struct pci_device_id *ent)
574 struct hamachi_private *hmp;
575 int option, i, rx_int_var, tx_int_var, boguscnt;
576 int chip_id = ent->driver_data;
577 int irq;
578 void __iomem *ioaddr;
579 unsigned long base;
580 static int card_idx;
581 struct net_device *dev;
582 void *ring_space;
583 dma_addr_t ring_dma;
584 int ret = -ENOMEM;
585 DECLARE_MAC_BUF(mac);
587 /* when built into the kernel, we only print version if device is found */
588 #ifndef MODULE
589 static int printed_version;
590 if (!printed_version++)
591 printk(version);
592 #endif
594 if (pci_enable_device(pdev)) {
595 ret = -EIO;
596 goto err_out;
599 base = pci_resource_start(pdev, 0);
600 #ifdef __alpha__ /* Really "64 bit addrs" */
601 base |= (pci_resource_start(pdev, 1) << 32);
602 #endif
604 pci_set_master(pdev);
606 i = pci_request_regions(pdev, DRV_NAME);
607 if (i)
608 return i;
610 irq = pdev->irq;
611 ioaddr = ioremap(base, 0x400);
612 if (!ioaddr)
613 goto err_out_release;
615 dev = alloc_etherdev(sizeof(struct hamachi_private));
616 if (!dev)
617 goto err_out_iounmap;
619 SET_NETDEV_DEV(dev, &pdev->dev);
621 #ifdef TX_CHECKSUM
622 printk("check that skbcopy in ip_queue_xmit isn't happening\n");
623 dev->hard_header_len += 8; /* for cksum tag */
624 #endif
626 for (i = 0; i < 6; i++)
627 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
628 : readb(ioaddr + StationAddr + i);
630 #if ! defined(final_version)
631 if (hamachi_debug > 4)
632 for (i = 0; i < 0x10; i++)
633 printk("%2.2x%s",
634 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
635 #endif
637 hmp = netdev_priv(dev);
638 spin_lock_init(&hmp->lock);
640 hmp->mii_if.dev = dev;
641 hmp->mii_if.mdio_read = mdio_read;
642 hmp->mii_if.mdio_write = mdio_write;
643 hmp->mii_if.phy_id_mask = 0x1f;
644 hmp->mii_if.reg_num_mask = 0x1f;
646 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
647 if (!ring_space)
648 goto err_out_cleardev;
649 hmp->tx_ring = (struct hamachi_desc *)ring_space;
650 hmp->tx_ring_dma = ring_dma;
652 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
653 if (!ring_space)
654 goto err_out_unmap_tx;
655 hmp->rx_ring = (struct hamachi_desc *)ring_space;
656 hmp->rx_ring_dma = ring_dma;
658 /* Check for options being passed in */
659 option = card_idx < MAX_UNITS ? options[card_idx] : 0;
660 if (dev->mem_start)
661 option = dev->mem_start;
663 /* If the bus size is misidentified, do the following. */
664 force32 = force32 ? force32 :
665 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 );
666 if (force32)
667 writeb(force32, ioaddr + VirtualJumpers);
669 /* Hmmm, do we really need to reset the chip???. */
670 writeb(0x01, ioaddr + ChipReset);
672 /* After a reset, the clock speed measurement of the PCI bus will not
673 * be valid for a moment. Wait for a little while until it is. If
674 * it takes more than 10ms, forget it.
676 udelay(10);
677 i = readb(ioaddr + PCIClkMeas);
678 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
679 udelay(10);
680 i = readb(ioaddr + PCIClkMeas);
683 hmp->base = ioaddr;
684 dev->base_addr = (unsigned long)ioaddr;
685 dev->irq = irq;
686 pci_set_drvdata(pdev, dev);
688 hmp->chip_id = chip_id;
689 hmp->pci_dev = pdev;
691 /* The lower four bits are the media type. */
692 if (option > 0) {
693 hmp->option = option;
694 if (option & 0x200)
695 hmp->mii_if.full_duplex = 1;
696 else if (option & 0x080)
697 hmp->mii_if.full_duplex = 0;
698 hmp->default_port = option & 15;
699 if (hmp->default_port)
700 hmp->mii_if.force_media = 1;
702 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0)
703 hmp->mii_if.full_duplex = 1;
705 /* lock the duplex mode if someone specified a value */
706 if (hmp->mii_if.full_duplex || (option & 0x080))
707 hmp->duplex_lock = 1;
709 /* Set interrupt tuning parameters */
710 max_rx_latency = max_rx_latency & 0x00ff;
711 max_rx_gap = max_rx_gap & 0x00ff;
712 min_rx_pkt = min_rx_pkt & 0x00ff;
713 max_tx_latency = max_tx_latency & 0x00ff;
714 max_tx_gap = max_tx_gap & 0x00ff;
715 min_tx_pkt = min_tx_pkt & 0x00ff;
717 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
718 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
719 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
720 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
721 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
722 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
725 /* The Hamachi-specific entries in the device structure. */
726 dev->open = &hamachi_open;
727 dev->hard_start_xmit = &hamachi_start_xmit;
728 dev->stop = &hamachi_close;
729 dev->get_stats = &hamachi_get_stats;
730 dev->set_multicast_list = &set_rx_mode;
731 dev->do_ioctl = &netdev_ioctl;
732 if (chip_tbl[hmp->chip_id].flags & CanHaveMII)
733 SET_ETHTOOL_OPS(dev, &ethtool_ops);
734 else
735 SET_ETHTOOL_OPS(dev, &ethtool_ops_no_mii);
736 dev->tx_timeout = &hamachi_tx_timeout;
737 dev->watchdog_timeo = TX_TIMEOUT;
738 if (mtu)
739 dev->mtu = mtu;
741 i = register_netdev(dev);
742 if (i) {
743 ret = i;
744 goto err_out_unmap_rx;
747 printk(KERN_INFO "%s: %s type %x at %p, %s, IRQ %d.\n",
748 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
749 ioaddr, print_mac(mac, dev->dev_addr), irq);
750 i = readb(ioaddr + PCIClkMeas);
751 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
752 "%2.2x, LPA %4.4x.\n",
753 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
754 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
755 readw(ioaddr + ANLinkPartnerAbility));
757 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
758 int phy, phy_idx = 0;
759 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
760 int mii_status = mdio_read(dev, phy, MII_BMSR);
761 if (mii_status != 0xffff &&
762 mii_status != 0x0000) {
763 hmp->phys[phy_idx++] = phy;
764 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
765 printk(KERN_INFO "%s: MII PHY found at address %d, status "
766 "0x%4.4x advertising %4.4x.\n",
767 dev->name, phy, mii_status, hmp->mii_if.advertising);
770 hmp->mii_cnt = phy_idx;
771 if (hmp->mii_cnt > 0)
772 hmp->mii_if.phy_id = hmp->phys[0];
773 else
774 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
776 /* Configure gigabit autonegotiation. */
777 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
778 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */
779 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */
781 card_idx++;
782 return 0;
784 err_out_unmap_rx:
785 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
786 hmp->rx_ring_dma);
787 err_out_unmap_tx:
788 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
789 hmp->tx_ring_dma);
790 err_out_cleardev:
791 free_netdev (dev);
792 err_out_iounmap:
793 iounmap(ioaddr);
794 err_out_release:
795 pci_release_regions(pdev);
796 err_out:
797 return ret;
800 static int __devinit read_eeprom(void __iomem *ioaddr, int location)
802 int bogus_cnt = 1000;
804 /* We should check busy first - per docs -KDU */
805 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
806 writew(location, ioaddr + EEAddr);
807 writeb(0x02, ioaddr + EECmdStatus);
808 bogus_cnt = 1000;
809 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0);
810 if (hamachi_debug > 5)
811 printk(" EEPROM status is %2.2x after %d ticks.\n",
812 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
813 return readb(ioaddr + EEData);
816 /* MII Managemen Data I/O accesses.
817 These routines assume the MDIO controller is idle, and do not exit until
818 the command is finished. */
820 static int mdio_read(struct net_device *dev, int phy_id, int location)
822 struct hamachi_private *hmp = netdev_priv(dev);
823 void __iomem *ioaddr = hmp->base;
824 int i;
826 /* We should check busy first - per docs -KDU */
827 for (i = 10000; i >= 0; i--)
828 if ((readw(ioaddr + MII_Status) & 1) == 0)
829 break;
830 writew((phy_id<<8) + location, ioaddr + MII_Addr);
831 writew(0x0001, ioaddr + MII_Cmd);
832 for (i = 10000; i >= 0; i--)
833 if ((readw(ioaddr + MII_Status) & 1) == 0)
834 break;
835 return readw(ioaddr + MII_Rd_Data);
838 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
840 struct hamachi_private *hmp = netdev_priv(dev);
841 void __iomem *ioaddr = hmp->base;
842 int i;
844 /* We should check busy first - per docs -KDU */
845 for (i = 10000; i >= 0; i--)
846 if ((readw(ioaddr + MII_Status) & 1) == 0)
847 break;
848 writew((phy_id<<8) + location, ioaddr + MII_Addr);
849 writew(value, ioaddr + MII_Wr_Data);
851 /* Wait for the command to finish. */
852 for (i = 10000; i >= 0; i--)
853 if ((readw(ioaddr + MII_Status) & 1) == 0)
854 break;
855 return;
859 static int hamachi_open(struct net_device *dev)
861 struct hamachi_private *hmp = netdev_priv(dev);
862 void __iomem *ioaddr = hmp->base;
863 int i;
864 u32 rx_int_var, tx_int_var;
865 u16 fifo_info;
867 i = request_irq(dev->irq, &hamachi_interrupt, IRQF_SHARED, dev->name, dev);
868 if (i)
869 return i;
871 if (hamachi_debug > 1)
872 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n",
873 dev->name, dev->irq);
875 hamachi_init_ring(dev);
877 #if ADDRLEN == 64
878 /* writellll anyone ? */
879 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
880 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
881 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
882 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
883 #else
884 writel(hmp->rx_ring_dma, ioaddr + RxPtr);
885 writel(hmp->tx_ring_dma, ioaddr + TxPtr);
886 #endif
888 /* TODO: It would make sense to organize this as words since the card
889 * documentation does. -KDU
891 for (i = 0; i < 6; i++)
892 writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
894 /* Initialize other registers: with so many this eventually this will
895 converted to an offset/value list. */
897 /* Configure the FIFO */
898 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
899 switch (fifo_info){
900 case 0 :
901 /* No FIFO */
902 writew(0x0000, ioaddr + FIFOcfg);
903 break;
904 case 1 :
905 /* Configure the FIFO for 512K external, 16K used for Tx. */
906 writew(0x0028, ioaddr + FIFOcfg);
907 break;
908 case 2 :
909 /* Configure the FIFO for 1024 external, 32K used for Tx. */
910 writew(0x004C, ioaddr + FIFOcfg);
911 break;
912 case 3 :
913 /* Configure the FIFO for 2048 external, 32K used for Tx. */
914 writew(0x006C, ioaddr + FIFOcfg);
915 break;
916 default :
917 printk(KERN_WARNING "%s: Unsupported external memory config!\n",
918 dev->name);
919 /* Default to no FIFO */
920 writew(0x0000, ioaddr + FIFOcfg);
921 break;
924 if (dev->if_port == 0)
925 dev->if_port = hmp->default_port;
928 /* Setting the Rx mode will start the Rx process. */
929 /* If someone didn't choose a duplex, default to full-duplex */
930 if (hmp->duplex_lock != 1)
931 hmp->mii_if.full_duplex = 1;
933 /* always 1, takes no more time to do it */
934 writew(0x0001, ioaddr + RxChecksum);
935 #ifdef TX_CHECKSUM
936 writew(0x0001, ioaddr + TxChecksum);
937 #else
938 writew(0x0000, ioaddr + TxChecksum);
939 #endif
940 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
941 writew(0x215F, ioaddr + MACCnfg);
942 writew(0x000C, ioaddr + FrameGap0);
943 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */
944 writew(0x1018, ioaddr + FrameGap1);
945 /* Why do we enable receives/transmits here? -KDU */
946 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
947 /* Enable automatic generation of flow control frames, period 0xffff. */
948 writel(0x0030FFFF, ioaddr + FlowCtrl);
949 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */
951 /* Enable legacy links. */
952 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */
953 /* Initial Link LED to blinking red. */
954 writeb(0x03, ioaddr + LEDCtrl);
956 /* Configure interrupt mitigation. This has a great effect on
957 performance, so systems tuning should start here!. */
959 rx_int_var = hmp->rx_int_var;
960 tx_int_var = hmp->tx_int_var;
962 if (hamachi_debug > 1) {
963 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
964 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
965 (tx_int_var & 0x00ff0000) >> 16);
966 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
967 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
968 (rx_int_var & 0x00ff0000) >> 16);
969 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
972 writel(tx_int_var, ioaddr + TxIntrCtrl);
973 writel(rx_int_var, ioaddr + RxIntrCtrl);
975 set_rx_mode(dev);
977 netif_start_queue(dev);
979 /* Enable interrupts by setting the interrupt mask. */
980 writel(0x80878787, ioaddr + InterruptEnable);
981 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */
983 /* Configure and start the DMA channels. */
984 /* Burst sizes are in the low three bits: size = 4<<(val&7) */
985 #if ADDRLEN == 64
986 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */
987 writew(0x005D, ioaddr + TxDMACtrl);
988 #else
989 writew(0x001D, ioaddr + RxDMACtrl);
990 writew(0x001D, ioaddr + TxDMACtrl);
991 #endif
992 writew(0x0001, ioaddr + RxCmd);
994 if (hamachi_debug > 2) {
995 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
996 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
998 /* Set the timer to check for link beat. */
999 init_timer(&hmp->timer);
1000 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */
1001 hmp->timer.data = (unsigned long)dev;
1002 hmp->timer.function = &hamachi_timer; /* timer handler */
1003 add_timer(&hmp->timer);
1005 return 0;
1008 static inline int hamachi_tx(struct net_device *dev)
1010 struct hamachi_private *hmp = netdev_priv(dev);
1012 /* Update the dirty pointer until we find an entry that is
1013 still owned by the card */
1014 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
1015 int entry = hmp->dirty_tx % TX_RING_SIZE;
1016 struct sk_buff *skb;
1018 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1019 break;
1020 /* Free the original skb. */
1021 skb = hmp->tx_skbuff[entry];
1022 if (skb) {
1023 pci_unmap_single(hmp->pci_dev,
1024 leXX_to_cpu(hmp->tx_ring[entry].addr),
1025 skb->len, PCI_DMA_TODEVICE);
1026 dev_kfree_skb(skb);
1027 hmp->tx_skbuff[entry] = NULL;
1029 hmp->tx_ring[entry].status_n_length = 0;
1030 if (entry >= TX_RING_SIZE-1)
1031 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1032 cpu_to_le32(DescEndRing);
1033 hmp->stats.tx_packets++;
1036 return 0;
1039 static void hamachi_timer(unsigned long data)
1041 struct net_device *dev = (struct net_device *)data;
1042 struct hamachi_private *hmp = netdev_priv(dev);
1043 void __iomem *ioaddr = hmp->base;
1044 int next_tick = 10*HZ;
1046 if (hamachi_debug > 2) {
1047 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1048 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1049 readw(ioaddr + ANLinkPartnerAbility));
1050 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1051 "%4.4x %4.4x %4.4x.\n", dev->name,
1052 readw(ioaddr + 0x0e0),
1053 readw(ioaddr + 0x0e2),
1054 readw(ioaddr + 0x0e4),
1055 readw(ioaddr + 0x0e6),
1056 readw(ioaddr + 0x0e8),
1057 readw(ioaddr + 0x0eA));
1059 /* We could do something here... nah. */
1060 hmp->timer.expires = RUN_AT(next_tick);
1061 add_timer(&hmp->timer);
1064 static void hamachi_tx_timeout(struct net_device *dev)
1066 int i;
1067 struct hamachi_private *hmp = netdev_priv(dev);
1068 void __iomem *ioaddr = hmp->base;
1070 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1071 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1074 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring);
1075 for (i = 0; i < RX_RING_SIZE; i++)
1076 printk(" %8.8x", le32_to_cpu(hmp->rx_ring[i].status_n_length));
1077 printk("\n"KERN_DEBUG" Tx ring %p: ", hmp->tx_ring);
1078 for (i = 0; i < TX_RING_SIZE; i++)
1079 printk(" %4.4x", le32_to_cpu(hmp->tx_ring[i].status_n_length));
1080 printk("\n");
1083 /* Reinit the hardware and make sure the Rx and Tx processes
1084 are up and running.
1086 dev->if_port = 0;
1087 /* The right way to do Reset. -KDU
1088 * -Clear OWN bit in all Rx/Tx descriptors
1089 * -Wait 50 uS for channels to go idle
1090 * -Turn off MAC receiver
1091 * -Issue Reset
1094 for (i = 0; i < RX_RING_SIZE; i++)
1095 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1097 /* Presume that all packets in the Tx queue are gone if we have to
1098 * re-init the hardware.
1100 for (i = 0; i < TX_RING_SIZE; i++){
1101 struct sk_buff *skb;
1103 if (i >= TX_RING_SIZE - 1)
1104 hmp->tx_ring[i].status_n_length =
1105 cpu_to_le32(DescEndRing) |
1106 (hmp->tx_ring[i].status_n_length &
1107 cpu_to_le32(0x0000ffff));
1108 else
1109 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1110 skb = hmp->tx_skbuff[i];
1111 if (skb){
1112 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr),
1113 skb->len, PCI_DMA_TODEVICE);
1114 dev_kfree_skb(skb);
1115 hmp->tx_skbuff[i] = NULL;
1119 udelay(60); /* Sleep 60 us just for safety sake */
1120 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1122 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */
1124 hmp->tx_full = 0;
1125 hmp->cur_rx = hmp->cur_tx = 0;
1126 hmp->dirty_rx = hmp->dirty_tx = 0;
1127 /* Rx packets are also presumed lost; however, we need to make sure a
1128 * ring of buffers is in tact. -KDU
1130 for (i = 0; i < RX_RING_SIZE; i++){
1131 struct sk_buff *skb = hmp->rx_skbuff[i];
1133 if (skb){
1134 pci_unmap_single(hmp->pci_dev,
1135 leXX_to_cpu(hmp->rx_ring[i].addr),
1136 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1137 dev_kfree_skb(skb);
1138 hmp->rx_skbuff[i] = NULL;
1141 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1142 for (i = 0; i < RX_RING_SIZE; i++) {
1143 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz);
1144 hmp->rx_skbuff[i] = skb;
1145 if (skb == NULL)
1146 break;
1148 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1149 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1150 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1151 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1152 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1154 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1155 /* Mark the last entry as wrapping the ring. */
1156 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1158 /* Trigger an immediate transmit demand. */
1159 dev->trans_start = jiffies;
1160 hmp->stats.tx_errors++;
1162 /* Restart the chip's Tx/Rx processes . */
1163 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1164 writew(0x0001, ioaddr + TxCmd); /* START Tx */
1165 writew(0x0001, ioaddr + RxCmd); /* START Rx */
1167 netif_wake_queue(dev);
1171 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1172 static void hamachi_init_ring(struct net_device *dev)
1174 struct hamachi_private *hmp = netdev_priv(dev);
1175 int i;
1177 hmp->tx_full = 0;
1178 hmp->cur_rx = hmp->cur_tx = 0;
1179 hmp->dirty_rx = hmp->dirty_tx = 0;
1181 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1182 * card needs room to do 8 byte alignment, +2 so we can reserve
1183 * the first 2 bytes, and +16 gets room for the status word from the
1184 * card. -KDU
1186 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1187 (((dev->mtu+26+7) & ~7) + 2 + 16));
1189 /* Initialize all Rx descriptors. */
1190 for (i = 0; i < RX_RING_SIZE; i++) {
1191 hmp->rx_ring[i].status_n_length = 0;
1192 hmp->rx_skbuff[i] = NULL;
1194 /* Fill in the Rx buffers. Handle allocation failure gracefully. */
1195 for (i = 0; i < RX_RING_SIZE; i++) {
1196 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1197 hmp->rx_skbuff[i] = skb;
1198 if (skb == NULL)
1199 break;
1200 skb->dev = dev; /* Mark as being used by this device. */
1201 skb_reserve(skb, 2); /* 16 byte align the IP header. */
1202 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1203 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1204 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1205 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1206 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1208 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1209 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1211 for (i = 0; i < TX_RING_SIZE; i++) {
1212 hmp->tx_skbuff[i] = NULL;
1213 hmp->tx_ring[i].status_n_length = 0;
1215 /* Mark the last entry of the ring */
1216 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1218 return;
1222 #ifdef TX_CHECKSUM
1223 #define csum_add(it, val) \
1224 do { \
1225 it += (u16) (val); \
1226 if (it & 0xffff0000) { \
1227 it &= 0xffff; \
1228 ++it; \
1230 } while (0)
1231 /* printk("add %04x --> %04x\n", val, it); \ */
1233 /* uh->len already network format, do not swap */
1234 #define pseudo_csum_udp(sum,ih,uh) do { \
1235 sum = 0; \
1236 csum_add(sum, (ih)->saddr >> 16); \
1237 csum_add(sum, (ih)->saddr & 0xffff); \
1238 csum_add(sum, (ih)->daddr >> 16); \
1239 csum_add(sum, (ih)->daddr & 0xffff); \
1240 csum_add(sum, __constant_htons(IPPROTO_UDP)); \
1241 csum_add(sum, (uh)->len); \
1242 } while (0)
1244 /* swap len */
1245 #define pseudo_csum_tcp(sum,ih,len) do { \
1246 sum = 0; \
1247 csum_add(sum, (ih)->saddr >> 16); \
1248 csum_add(sum, (ih)->saddr & 0xffff); \
1249 csum_add(sum, (ih)->daddr >> 16); \
1250 csum_add(sum, (ih)->daddr & 0xffff); \
1251 csum_add(sum, __constant_htons(IPPROTO_TCP)); \
1252 csum_add(sum, htons(len)); \
1253 } while (0)
1254 #endif
1256 static int hamachi_start_xmit(struct sk_buff *skb, struct net_device *dev)
1258 struct hamachi_private *hmp = netdev_priv(dev);
1259 unsigned entry;
1260 u16 status;
1262 /* Ok, now make sure that the queue has space before trying to
1263 add another skbuff. if we return non-zero the scheduler
1264 should interpret this as a queue full and requeue the buffer
1265 for later.
1267 if (hmp->tx_full) {
1268 /* We should NEVER reach this point -KDU */
1269 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1271 /* Wake the potentially-idle transmit channel. */
1272 /* If we don't need to read status, DON'T -KDU */
1273 status=readw(hmp->base + TxStatus);
1274 if( !(status & 0x0001) || (status & 0x0002))
1275 writew(0x0001, hmp->base + TxCmd);
1276 return 1;
1279 /* Caution: the write order is important here, set the field
1280 with the "ownership" bits last. */
1282 /* Calculate the next Tx descriptor entry. */
1283 entry = hmp->cur_tx % TX_RING_SIZE;
1285 hmp->tx_skbuff[entry] = skb;
1287 #ifdef TX_CHECKSUM
1289 /* tack on checksum tag */
1290 u32 tagval = 0;
1291 struct ethhdr *eh = (struct ethhdr *)skb->data;
1292 if (eh->h_proto == __constant_htons(ETH_P_IP)) {
1293 struct iphdr *ih = (struct iphdr *)((char *)eh + ETH_HLEN);
1294 if (ih->protocol == IPPROTO_UDP) {
1295 struct udphdr *uh
1296 = (struct udphdr *)((char *)ih + ih->ihl*4);
1297 u32 offset = ((unsigned char *)uh + 6) - skb->data;
1298 u32 pseudo;
1299 pseudo_csum_udp(pseudo, ih, uh);
1300 pseudo = htons(pseudo);
1301 printk("udp cksum was %04x, sending pseudo %04x\n",
1302 uh->check, pseudo);
1303 uh->check = 0; /* zero out uh->check before card calc */
1305 * start at 14 (skip ethhdr), store at offset (uh->check),
1306 * use pseudo value given.
1308 tagval = (14 << 24) | (offset << 16) | pseudo;
1309 } else if (ih->protocol == IPPROTO_TCP) {
1310 printk("tcp, no auto cksum\n");
1313 *(u32 *)skb_push(skb, 8) = tagval;
1315 #endif
1317 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1318 skb->data, skb->len, PCI_DMA_TODEVICE));
1320 /* Hmmmm, could probably put a DescIntr on these, but the way
1321 the driver is currently coded makes Tx interrupts unnecessary
1322 since the clearing of the Tx ring is handled by the start_xmit
1323 routine. This organization helps mitigate the interrupts a
1324 bit and probably renders the max_tx_latency param useless.
1326 Update: Putting a DescIntr bit on all of the descriptors and
1327 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1329 if (entry >= TX_RING_SIZE-1) /* Wrap ring */
1330 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1331 DescEndPacket | DescEndRing | DescIntr | skb->len);
1332 else
1333 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1334 DescEndPacket | DescIntr | skb->len);
1335 hmp->cur_tx++;
1337 /* Non-x86 Todo: explicitly flush cache lines here. */
1339 /* Wake the potentially-idle transmit channel. */
1340 /* If we don't need to read status, DON'T -KDU */
1341 status=readw(hmp->base + TxStatus);
1342 if( !(status & 0x0001) || (status & 0x0002))
1343 writew(0x0001, hmp->base + TxCmd);
1345 /* Immediately before returning, let's clear as many entries as we can. */
1346 hamachi_tx(dev);
1348 /* We should kick the bottom half here, since we are not accepting
1349 * interrupts with every packet. i.e. realize that Gigabit ethernet
1350 * can transmit faster than ordinary machines can load packets;
1351 * hence, any packet that got put off because we were in the transmit
1352 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1354 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1355 netif_wake_queue(dev); /* Typical path */
1356 else {
1357 hmp->tx_full = 1;
1358 netif_stop_queue(dev);
1360 dev->trans_start = jiffies;
1362 if (hamachi_debug > 4) {
1363 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1364 dev->name, hmp->cur_tx, entry);
1366 return 0;
1369 /* The interrupt handler does all of the Rx thread work and cleans up
1370 after the Tx thread. */
1371 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1373 struct net_device *dev = dev_instance;
1374 struct hamachi_private *hmp = netdev_priv(dev);
1375 void __iomem *ioaddr = hmp->base;
1376 long boguscnt = max_interrupt_work;
1377 int handled = 0;
1379 #ifndef final_version /* Can never occur. */
1380 if (dev == NULL) {
1381 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1382 return IRQ_NONE;
1384 #endif
1386 spin_lock(&hmp->lock);
1388 do {
1389 u32 intr_status = readl(ioaddr + InterruptClear);
1391 if (hamachi_debug > 4)
1392 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1393 dev->name, intr_status);
1395 if (intr_status == 0)
1396 break;
1398 handled = 1;
1400 if (intr_status & IntrRxDone)
1401 hamachi_rx(dev);
1403 if (intr_status & IntrTxDone){
1404 /* This code should RARELY need to execute. After all, this is
1405 * a gigabit link, it should consume packets as fast as we put
1406 * them in AND we clear the Tx ring in hamachi_start_xmit().
1408 if (hmp->tx_full){
1409 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1410 int entry = hmp->dirty_tx % TX_RING_SIZE;
1411 struct sk_buff *skb;
1413 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1414 break;
1415 skb = hmp->tx_skbuff[entry];
1416 /* Free the original skb. */
1417 if (skb){
1418 pci_unmap_single(hmp->pci_dev,
1419 leXX_to_cpu(hmp->tx_ring[entry].addr),
1420 skb->len,
1421 PCI_DMA_TODEVICE);
1422 dev_kfree_skb_irq(skb);
1423 hmp->tx_skbuff[entry] = NULL;
1425 hmp->tx_ring[entry].status_n_length = 0;
1426 if (entry >= TX_RING_SIZE-1)
1427 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1428 cpu_to_le32(DescEndRing);
1429 hmp->stats.tx_packets++;
1431 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1432 /* The ring is no longer full */
1433 hmp->tx_full = 0;
1434 netif_wake_queue(dev);
1436 } else {
1437 netif_wake_queue(dev);
1442 /* Abnormal error summary/uncommon events handlers. */
1443 if (intr_status &
1444 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1445 LinkChange | NegotiationChange | StatsMax))
1446 hamachi_error(dev, intr_status);
1448 if (--boguscnt < 0) {
1449 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1450 dev->name, intr_status);
1451 break;
1453 } while (1);
1455 if (hamachi_debug > 3)
1456 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1457 dev->name, readl(ioaddr + IntrStatus));
1459 #ifndef final_version
1460 /* Code that should never be run! Perhaps remove after testing.. */
1462 static int stopit = 10;
1463 if (dev->start == 0 && --stopit < 0) {
1464 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1465 dev->name);
1466 free_irq(irq, dev);
1469 #endif
1471 spin_unlock(&hmp->lock);
1472 return IRQ_RETVAL(handled);
1475 /* This routine is logically part of the interrupt handler, but separated
1476 for clarity and better register allocation. */
1477 static int hamachi_rx(struct net_device *dev)
1479 struct hamachi_private *hmp = netdev_priv(dev);
1480 int entry = hmp->cur_rx % RX_RING_SIZE;
1481 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1483 if (hamachi_debug > 4) {
1484 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1485 entry, hmp->rx_ring[entry].status_n_length);
1488 /* If EOP is set on the next entry, it's a new packet. Send it up. */
1489 while (1) {
1490 struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1491 u32 desc_status = le32_to_cpu(desc->status_n_length);
1492 u16 data_size = desc_status; /* Implicit truncate */
1493 u8 *buf_addr;
1494 s32 frame_status;
1496 if (desc_status & DescOwn)
1497 break;
1498 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1499 leXX_to_cpu(desc->addr),
1500 hmp->rx_buf_sz,
1501 PCI_DMA_FROMDEVICE);
1502 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1503 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1504 if (hamachi_debug > 4)
1505 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n",
1506 frame_status);
1507 if (--boguscnt < 0)
1508 break;
1509 if ( ! (desc_status & DescEndPacket)) {
1510 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1511 "multiple buffers, entry %#x length %d status %4.4x!\n",
1512 dev->name, hmp->cur_rx, data_size, desc_status);
1513 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1514 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1515 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1516 dev->name,
1517 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1518 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1519 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1520 hmp->stats.rx_length_errors++;
1521 } /* else Omit for prototype errata??? */
1522 if (frame_status & 0x00380000) {
1523 /* There was an error. */
1524 if (hamachi_debug > 2)
1525 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n",
1526 frame_status);
1527 hmp->stats.rx_errors++;
1528 if (frame_status & 0x00600000) hmp->stats.rx_length_errors++;
1529 if (frame_status & 0x00080000) hmp->stats.rx_frame_errors++;
1530 if (frame_status & 0x00100000) hmp->stats.rx_crc_errors++;
1531 if (frame_status < 0) hmp->stats.rx_dropped++;
1532 } else {
1533 struct sk_buff *skb;
1534 /* Omit CRC */
1535 u16 pkt_len = (frame_status & 0x07ff) - 4;
1536 #ifdef RX_CHECKSUM
1537 u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1538 #endif
1541 #ifndef final_version
1542 if (hamachi_debug > 4)
1543 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d"
1544 " of %d, bogus_cnt %d.\n",
1545 pkt_len, data_size, boguscnt);
1546 if (hamachi_debug > 5)
1547 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1548 dev->name,
1549 *(s32*)&(buf_addr[data_size - 20]),
1550 *(s32*)&(buf_addr[data_size - 16]),
1551 *(s32*)&(buf_addr[data_size - 12]),
1552 *(s32*)&(buf_addr[data_size - 8]),
1553 *(s32*)&(buf_addr[data_size - 4]));
1554 #endif
1555 /* Check if the packet is long enough to accept without copying
1556 to a minimally-sized skbuff. */
1557 if (pkt_len < rx_copybreak
1558 && (skb = dev_alloc_skb(pkt_len + 2)) != NULL) {
1559 #ifdef RX_CHECKSUM
1560 printk(KERN_ERR "%s: rx_copybreak non-zero "
1561 "not good with RX_CHECKSUM\n", dev->name);
1562 #endif
1563 skb_reserve(skb, 2); /* 16 byte align the IP header */
1564 pci_dma_sync_single_for_cpu(hmp->pci_dev,
1565 leXX_to_cpu(hmp->rx_ring[entry].addr),
1566 hmp->rx_buf_sz,
1567 PCI_DMA_FROMDEVICE);
1568 /* Call copy + cksum if available. */
1569 #if 1 || USE_IP_COPYSUM
1570 skb_copy_to_linear_data(skb,
1571 hmp->rx_skbuff[entry]->data, pkt_len);
1572 skb_put(skb, pkt_len);
1573 #else
1574 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma
1575 + entry*sizeof(*desc), pkt_len);
1576 #endif
1577 pci_dma_sync_single_for_device(hmp->pci_dev,
1578 leXX_to_cpu(hmp->rx_ring[entry].addr),
1579 hmp->rx_buf_sz,
1580 PCI_DMA_FROMDEVICE);
1581 } else {
1582 pci_unmap_single(hmp->pci_dev,
1583 leXX_to_cpu(hmp->rx_ring[entry].addr),
1584 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1585 skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1586 hmp->rx_skbuff[entry] = NULL;
1588 skb->protocol = eth_type_trans(skb, dev);
1591 #ifdef RX_CHECKSUM
1592 /* TCP or UDP on ipv4, DIX encoding */
1593 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1594 struct iphdr *ih = (struct iphdr *) skb->data;
1595 /* Check that IP packet is at least 46 bytes, otherwise,
1596 * there may be pad bytes included in the hardware checksum.
1597 * This wouldn't happen if everyone padded with 0.
1599 if (ntohs(ih->tot_len) >= 46){
1600 /* don't worry about frags */
1601 if (!(ih->frag_off & __constant_htons(IP_MF|IP_OFFSET))) {
1602 u32 inv = *(u32 *) &buf_addr[data_size - 16];
1603 u32 *p = (u32 *) &buf_addr[data_size - 20];
1604 register u32 crc, p_r, p_r1;
1606 if (inv & 4) {
1607 inv &= ~4;
1608 --p;
1610 p_r = *p;
1611 p_r1 = *(p-1);
1612 switch (inv) {
1613 case 0:
1614 crc = (p_r & 0xffff) + (p_r >> 16);
1615 break;
1616 case 1:
1617 crc = (p_r >> 16) + (p_r & 0xffff)
1618 + (p_r1 >> 16 & 0xff00);
1619 break;
1620 case 2:
1621 crc = p_r + (p_r1 >> 16);
1622 break;
1623 case 3:
1624 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1625 break;
1626 default: /*NOTREACHED*/ crc = 0;
1628 if (crc & 0xffff0000) {
1629 crc &= 0xffff;
1630 ++crc;
1632 /* tcp/udp will add in pseudo */
1633 skb->csum = ntohs(pfck & 0xffff);
1634 if (skb->csum > crc)
1635 skb->csum -= crc;
1636 else
1637 skb->csum += (~crc & 0xffff);
1639 * could do the pseudo myself and return
1640 * CHECKSUM_UNNECESSARY
1642 skb->ip_summed = CHECKSUM_COMPLETE;
1646 #endif /* RX_CHECKSUM */
1648 netif_rx(skb);
1649 dev->last_rx = jiffies;
1650 hmp->stats.rx_packets++;
1652 entry = (++hmp->cur_rx) % RX_RING_SIZE;
1655 /* Refill the Rx ring buffers. */
1656 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1657 struct hamachi_desc *desc;
1659 entry = hmp->dirty_rx % RX_RING_SIZE;
1660 desc = &(hmp->rx_ring[entry]);
1661 if (hmp->rx_skbuff[entry] == NULL) {
1662 struct sk_buff *skb = dev_alloc_skb(hmp->rx_buf_sz);
1664 hmp->rx_skbuff[entry] = skb;
1665 if (skb == NULL)
1666 break; /* Better luck next round. */
1667 skb->dev = dev; /* Mark as being used by this device. */
1668 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */
1669 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev,
1670 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE));
1672 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1673 if (entry >= RX_RING_SIZE-1)
1674 desc->status_n_length |= cpu_to_le32(DescOwn |
1675 DescEndPacket | DescEndRing | DescIntr);
1676 else
1677 desc->status_n_length |= cpu_to_le32(DescOwn |
1678 DescEndPacket | DescIntr);
1681 /* Restart Rx engine if stopped. */
1682 /* If we don't need to check status, don't. -KDU */
1683 if (readw(hmp->base + RxStatus) & 0x0002)
1684 writew(0x0001, hmp->base + RxCmd);
1686 return 0;
1689 /* This is more properly named "uncommon interrupt events", as it covers more
1690 than just errors. */
1691 static void hamachi_error(struct net_device *dev, int intr_status)
1693 struct hamachi_private *hmp = netdev_priv(dev);
1694 void __iomem *ioaddr = hmp->base;
1696 if (intr_status & (LinkChange|NegotiationChange)) {
1697 if (hamachi_debug > 1)
1698 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1699 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1700 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1701 readw(ioaddr + ANLinkPartnerAbility),
1702 readl(ioaddr + IntrStatus));
1703 if (readw(ioaddr + ANStatus) & 0x20)
1704 writeb(0x01, ioaddr + LEDCtrl);
1705 else
1706 writeb(0x03, ioaddr + LEDCtrl);
1708 if (intr_status & StatsMax) {
1709 hamachi_get_stats(dev);
1710 /* Read the overflow bits to clear. */
1711 readl(ioaddr + 0x370);
1712 readl(ioaddr + 0x3F0);
1714 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone))
1715 && hamachi_debug)
1716 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1717 dev->name, intr_status);
1718 /* Hmmmmm, it's not clear how to recover from PCI faults. */
1719 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1720 hmp->stats.tx_fifo_errors++;
1721 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1722 hmp->stats.rx_fifo_errors++;
1725 static int hamachi_close(struct net_device *dev)
1727 struct hamachi_private *hmp = netdev_priv(dev);
1728 void __iomem *ioaddr = hmp->base;
1729 struct sk_buff *skb;
1730 int i;
1732 netif_stop_queue(dev);
1734 if (hamachi_debug > 1) {
1735 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1736 dev->name, readw(ioaddr + TxStatus),
1737 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1738 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
1739 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1742 /* Disable interrupts by clearing the interrupt mask. */
1743 writel(0x0000, ioaddr + InterruptEnable);
1745 /* Stop the chip's Tx and Rx processes. */
1746 writel(2, ioaddr + RxCmd);
1747 writew(2, ioaddr + TxCmd);
1749 #ifdef __i386__
1750 if (hamachi_debug > 2) {
1751 printk("\n"KERN_DEBUG" Tx ring at %8.8x:\n",
1752 (int)hmp->tx_ring_dma);
1753 for (i = 0; i < TX_RING_SIZE; i++)
1754 printk(" %c #%d desc. %8.8x %8.8x.\n",
1755 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1756 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1757 printk("\n"KERN_DEBUG " Rx ring %8.8x:\n",
1758 (int)hmp->rx_ring_dma);
1759 for (i = 0; i < RX_RING_SIZE; i++) {
1760 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1761 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1762 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1763 if (hamachi_debug > 6) {
1764 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1765 u16 *addr = (u16 *)
1766 hmp->rx_skbuff[i]->data;
1767 int j;
1769 for (j = 0; j < 0x50; j++)
1770 printk(" %4.4x", addr[j]);
1771 printk("\n");
1776 #endif /* __i386__ debugging only */
1778 free_irq(dev->irq, dev);
1780 del_timer_sync(&hmp->timer);
1782 /* Free all the skbuffs in the Rx queue. */
1783 for (i = 0; i < RX_RING_SIZE; i++) {
1784 skb = hmp->rx_skbuff[i];
1785 hmp->rx_ring[i].status_n_length = 0;
1786 if (skb) {
1787 pci_unmap_single(hmp->pci_dev,
1788 leXX_to_cpu(hmp->rx_ring[i].addr),
1789 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE);
1790 dev_kfree_skb(skb);
1791 hmp->rx_skbuff[i] = NULL;
1793 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1795 for (i = 0; i < TX_RING_SIZE; i++) {
1796 skb = hmp->tx_skbuff[i];
1797 if (skb) {
1798 pci_unmap_single(hmp->pci_dev,
1799 leXX_to_cpu(hmp->tx_ring[i].addr),
1800 skb->len, PCI_DMA_TODEVICE);
1801 dev_kfree_skb(skb);
1802 hmp->tx_skbuff[i] = NULL;
1806 writeb(0x00, ioaddr + LEDCtrl);
1808 return 0;
1811 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1813 struct hamachi_private *hmp = netdev_priv(dev);
1814 void __iomem *ioaddr = hmp->base;
1816 /* We should lock this segment of code for SMP eventually, although
1817 the vulnerability window is very small and statistics are
1818 non-critical. */
1819 /* Ok, what goes here? This appears to be stuck at 21 packets
1820 according to ifconfig. It does get incremented in hamachi_tx(),
1821 so I think I'll comment it out here and see if better things
1822 happen.
1824 /* hmp->stats.tx_packets = readl(ioaddr + 0x000); */
1826 hmp->stats.rx_bytes = readl(ioaddr + 0x330); /* Total Uni+Brd+Multi */
1827 hmp->stats.tx_bytes = readl(ioaddr + 0x3B0); /* Total Uni+Brd+Multi */
1828 hmp->stats.multicast = readl(ioaddr + 0x320); /* Multicast Rx */
1830 hmp->stats.rx_length_errors = readl(ioaddr + 0x368); /* Over+Undersized */
1831 hmp->stats.rx_over_errors = readl(ioaddr + 0x35C); /* Jabber */
1832 hmp->stats.rx_crc_errors = readl(ioaddr + 0x360); /* Jabber */
1833 hmp->stats.rx_frame_errors = readl(ioaddr + 0x364); /* Symbol Errs */
1834 hmp->stats.rx_missed_errors = readl(ioaddr + 0x36C); /* Dropped */
1836 return &hmp->stats;
1839 static void set_rx_mode(struct net_device *dev)
1841 struct hamachi_private *hmp = netdev_priv(dev);
1842 void __iomem *ioaddr = hmp->base;
1844 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1845 writew(0x000F, ioaddr + AddrMode);
1846 } else if ((dev->mc_count > 63) || (dev->flags & IFF_ALLMULTI)) {
1847 /* Too many to match, or accept all multicasts. */
1848 writew(0x000B, ioaddr + AddrMode);
1849 } else if (dev->mc_count > 0) { /* Must use the CAM filter. */
1850 struct dev_mc_list *mclist;
1851 int i;
1852 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
1853 i++, mclist = mclist->next) {
1854 writel(*(u32*)(mclist->dmi_addr), ioaddr + 0x100 + i*8);
1855 writel(0x20000 | (*(u16*)&mclist->dmi_addr[4]),
1856 ioaddr + 0x104 + i*8);
1858 /* Clear remaining entries. */
1859 for (; i < 64; i++)
1860 writel(0, ioaddr + 0x104 + i*8);
1861 writew(0x0003, ioaddr + AddrMode);
1862 } else { /* Normal, unicast/broadcast-only mode. */
1863 writew(0x0001, ioaddr + AddrMode);
1867 static int check_if_running(struct net_device *dev)
1869 if (!netif_running(dev))
1870 return -EINVAL;
1871 return 0;
1874 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1876 struct hamachi_private *np = netdev_priv(dev);
1877 strcpy(info->driver, DRV_NAME);
1878 strcpy(info->version, DRV_VERSION);
1879 strcpy(info->bus_info, pci_name(np->pci_dev));
1882 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1884 struct hamachi_private *np = netdev_priv(dev);
1885 spin_lock_irq(&np->lock);
1886 mii_ethtool_gset(&np->mii_if, ecmd);
1887 spin_unlock_irq(&np->lock);
1888 return 0;
1891 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1893 struct hamachi_private *np = netdev_priv(dev);
1894 int res;
1895 spin_lock_irq(&np->lock);
1896 res = mii_ethtool_sset(&np->mii_if, ecmd);
1897 spin_unlock_irq(&np->lock);
1898 return res;
1901 static int hamachi_nway_reset(struct net_device *dev)
1903 struct hamachi_private *np = netdev_priv(dev);
1904 return mii_nway_restart(&np->mii_if);
1907 static u32 hamachi_get_link(struct net_device *dev)
1909 struct hamachi_private *np = netdev_priv(dev);
1910 return mii_link_ok(&np->mii_if);
1913 static const struct ethtool_ops ethtool_ops = {
1914 .begin = check_if_running,
1915 .get_drvinfo = hamachi_get_drvinfo,
1916 .get_settings = hamachi_get_settings,
1917 .set_settings = hamachi_set_settings,
1918 .nway_reset = hamachi_nway_reset,
1919 .get_link = hamachi_get_link,
1922 static const struct ethtool_ops ethtool_ops_no_mii = {
1923 .begin = check_if_running,
1924 .get_drvinfo = hamachi_get_drvinfo,
1927 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1929 struct hamachi_private *np = netdev_priv(dev);
1930 struct mii_ioctl_data *data = if_mii(rq);
1931 int rc;
1933 if (!netif_running(dev))
1934 return -EINVAL;
1936 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1937 u32 *d = (u32 *)&rq->ifr_ifru;
1938 /* Should add this check here or an ordinary user can do nasty
1939 * things. -KDU
1941 * TODO: Shut down the Rx and Tx engines while doing this.
1943 if (!capable(CAP_NET_ADMIN))
1944 return -EPERM;
1945 writel(d[0], np->base + TxIntrCtrl);
1946 writel(d[1], np->base + RxIntrCtrl);
1947 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1948 (u32) readl(np->base + TxIntrCtrl),
1949 (u32) readl(np->base + RxIntrCtrl));
1950 rc = 0;
1953 else {
1954 spin_lock_irq(&np->lock);
1955 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1956 spin_unlock_irq(&np->lock);
1959 return rc;
1963 static void __devexit hamachi_remove_one (struct pci_dev *pdev)
1965 struct net_device *dev = pci_get_drvdata(pdev);
1967 if (dev) {
1968 struct hamachi_private *hmp = netdev_priv(dev);
1970 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring,
1971 hmp->rx_ring_dma);
1972 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring,
1973 hmp->tx_ring_dma);
1974 unregister_netdev(dev);
1975 iounmap(hmp->base);
1976 free_netdev(dev);
1977 pci_release_regions(pdev);
1978 pci_set_drvdata(pdev, NULL);
1982 static struct pci_device_id hamachi_pci_tbl[] = {
1983 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1984 { 0, }
1986 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1988 static struct pci_driver hamachi_driver = {
1989 .name = DRV_NAME,
1990 .id_table = hamachi_pci_tbl,
1991 .probe = hamachi_init_one,
1992 .remove = __devexit_p(hamachi_remove_one),
1995 static int __init hamachi_init (void)
1997 /* when a module, this is printed whether or not devices are found in probe */
1998 #ifdef MODULE
1999 printk(version);
2000 #endif
2001 return pci_register_driver(&hamachi_driver);
2004 static void __exit hamachi_exit (void)
2006 pci_unregister_driver(&hamachi_driver);
2010 module_init(hamachi_init);
2011 module_exit(hamachi_exit);