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x86/mm/pat: Don't report PAT on CPUs that don't support it
[linux/fpc-iii.git] / drivers / net / ethernet / amd / sunlance.c
blob291ca5187f12333e2c13c23adc79903044c78bb5
1 /* $Id: sunlance.c,v 1.112 2002/01/15 06:48:55 davem Exp $
2 * lance.c: Linux/Sparc/Lance driver
3 *
4 * Written 1995, 1996 by Miguel de Icaza
5 * Sources:
6 * The Linux depca driver
7 * The Linux lance driver.
8 * The Linux skeleton driver.
9 * The NetBSD Sparc/Lance driver.
10 * Theo de Raadt (deraadt@openbsd.org)
11 * NCR92C990 Lan Controller manual
12 *
13 * 1.4:
14 * Added support to run with a ledma on the Sun4m
15 *
16 * 1.5:
17 * Added multiple card detection.
18 *
19 * 4/17/96: Burst sizes and tpe selection on sun4m by Eddie C. Dost
20 * (ecd@skynet.be)
21 *
22 * 5/15/96: auto carrier detection on sun4m by Eddie C. Dost
23 * (ecd@skynet.be)
24 *
25 * 5/17/96: lebuffer on scsi/ether cards now work David S. Miller
26 * (davem@caip.rutgers.edu)
27 *
28 * 5/29/96: override option 'tpe-link-test?', if it is 'false', as
29 * this disables auto carrier detection on sun4m. Eddie C. Dost
30 * (ecd@skynet.be)
31 *
32 * 1.7:
33 * 6/26/96: Bug fix for multiple ledmas, miguel.
34 *
35 * 1.8:
36 * Stole multicast code from depca.c, fixed lance_tx.
37 *
38 * 1.9:
39 * 8/21/96: Fixed the multicast code (Pedro Roque)
40 *
41 * 8/28/96: Send fake packet in lance_open() if auto_select is true,
42 * so we can detect the carrier loss condition in time.
43 * Eddie C. Dost (ecd@skynet.be)
44 *
45 * 9/15/96: Align rx_buf so that eth_copy_and_sum() won't cause an
46 * MNA trap during chksum_partial_copy(). (ecd@skynet.be)
47 *
48 * 11/17/96: Handle LE_C0_MERR in lance_interrupt(). (ecd@skynet.be)
49 *
50 * 12/22/96: Don't loop forever in lance_rx() on incomplete packets.
51 * This was the sun4c killer. Shit, stupid bug.
52 * (ecd@skynet.be)
53 *
54 * 1.10:
55 * 1/26/97: Modularize driver. (ecd@skynet.be)
56 *
57 * 1.11:
58 * 12/27/97: Added sun4d support. (jj@sunsite.mff.cuni.cz)
59 *
60 * 1.12:
61 * 11/3/99: Fixed SMP race in lance_start_xmit found by davem.
62 * Anton Blanchard (anton@progsoc.uts.edu.au)
63 * 2.00: 11/9/99: Massive overhaul and port to new SBUS driver interfaces.
64 * David S. Miller (davem@redhat.com)
65 * 2.01:
66 * 11/08/01: Use library crc32 functions (Matt_Domsch@dell.com)
67 *
68 */
69
70 #undef DEBUG_DRIVER
71
72 static char lancestr[] = "LANCE";
73
74 #include <linux/module.h>
75 #include <linux/kernel.h>
76 #include <linux/types.h>
77 #include <linux/fcntl.h>
78 #include <linux/interrupt.h>
79 #include <linux/ioport.h>
80 #include <linux/in.h>
81 #include <linux/string.h>
82 #include <linux/delay.h>
83 #include <linux/crc32.h>
84 #include <linux/errno.h>
85 #include <linux/socket.h> /* Used for the temporal inet entries and routing */
86 #include <linux/route.h>
87 #include <linux/netdevice.h>
88 #include <linux/etherdevice.h>
89 #include <linux/skbuff.h>
90 #include <linux/ethtool.h>
91 #include <linux/bitops.h>
92 #include <linux/dma-mapping.h>
93 #include <linux/of.h>
94 #include <linux/of_device.h>
95 #include <linux/gfp.h>
96
97 #include <asm/io.h>
98 #include <asm/dma.h>
99 #include <asm/pgtable.h>
100 #include <asm/byteorder.h> /* Used by the checksum routines */
101 #include <asm/idprom.h>
102 #include <asm/prom.h>
103 #include <asm/auxio.h> /* For tpe-link-test? setting */
104 #include <asm/irq.h>
105
106 #define DRV_NAME "sunlance"
107 #define DRV_VERSION "2.02"
108 #define DRV_RELDATE "8/24/03"
109 #define DRV_AUTHOR "Miguel de Icaza (miguel@nuclecu.unam.mx)"
110
111 static char version[] =
112 DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " " DRV_AUTHOR "\n";
113
114 MODULE_VERSION(DRV_VERSION);
115 MODULE_AUTHOR(DRV_AUTHOR);
116 MODULE_DESCRIPTION("Sun Lance ethernet driver");
117 MODULE_LICENSE("GPL");
118
119 /* Define: 2^4 Tx buffers and 2^4 Rx buffers */
120 #ifndef LANCE_LOG_TX_BUFFERS
121 #define LANCE_LOG_TX_BUFFERS 4
122 #define LANCE_LOG_RX_BUFFERS 4
123 #endif
124
125 #define LE_CSR0 0
126 #define LE_CSR1 1
127 #define LE_CSR2 2
128 #define LE_CSR3 3
129
130 #define LE_MO_PROM 0x8000 /* Enable promiscuous mode */
131
132 #define LE_C0_ERR 0x8000 /* Error: set if BAB, SQE, MISS or ME is set */
133 #define LE_C0_BABL 0x4000 /* BAB: Babble: tx timeout. */
134 #define LE_C0_CERR 0x2000 /* SQE: Signal quality error */
135 #define LE_C0_MISS 0x1000 /* MISS: Missed a packet */
136 #define LE_C0_MERR 0x0800 /* ME: Memory error */
137 #define LE_C0_RINT 0x0400 /* Received interrupt */
138 #define LE_C0_TINT 0x0200 /* Transmitter Interrupt */
139 #define LE_C0_IDON 0x0100 /* IFIN: Init finished. */
140 #define LE_C0_INTR 0x0080 /* Interrupt or error */
141 #define LE_C0_INEA 0x0040 /* Interrupt enable */
142 #define LE_C0_RXON 0x0020 /* Receiver on */
143 #define LE_C0_TXON 0x0010 /* Transmitter on */
144 #define LE_C0_TDMD 0x0008 /* Transmitter demand */
145 #define LE_C0_STOP 0x0004 /* Stop the card */
146 #define LE_C0_STRT 0x0002 /* Start the card */
147 #define LE_C0_INIT 0x0001 /* Init the card */
148
149 #define LE_C3_BSWP 0x4 /* SWAP */
150 #define LE_C3_ACON 0x2 /* ALE Control */
151 #define LE_C3_BCON 0x1 /* Byte control */
152
153 /* Receive message descriptor 1 */
154 #define LE_R1_OWN 0x80 /* Who owns the entry */
155 #define LE_R1_ERR 0x40 /* Error: if FRA, OFL, CRC or BUF is set */
156 #define LE_R1_FRA 0x20 /* FRA: Frame error */
157 #define LE_R1_OFL 0x10 /* OFL: Frame overflow */
158 #define LE_R1_CRC 0x08 /* CRC error */
159 #define LE_R1_BUF 0x04 /* BUF: Buffer error */
160 #define LE_R1_SOP 0x02 /* Start of packet */
161 #define LE_R1_EOP 0x01 /* End of packet */
162 #define LE_R1_POK 0x03 /* Packet is complete: SOP + EOP */
163
164 #define LE_T1_OWN 0x80 /* Lance owns the packet */
165 #define LE_T1_ERR 0x40 /* Error summary */
166 #define LE_T1_EMORE 0x10 /* Error: more than one retry needed */
167 #define LE_T1_EONE 0x08 /* Error: one retry needed */
168 #define LE_T1_EDEF 0x04 /* Error: deferred */
169 #define LE_T1_SOP 0x02 /* Start of packet */
170 #define LE_T1_EOP 0x01 /* End of packet */
171 #define LE_T1_POK 0x03 /* Packet is complete: SOP + EOP */
172
173 #define LE_T3_BUF 0x8000 /* Buffer error */
174 #define LE_T3_UFL 0x4000 /* Error underflow */
175 #define LE_T3_LCOL 0x1000 /* Error late collision */
176 #define LE_T3_CLOS 0x0800 /* Error carrier loss */
177 #define LE_T3_RTY 0x0400 /* Error retry */
178 #define LE_T3_TDR 0x03ff /* Time Domain Reflectometry counter */
179
180 #define TX_RING_SIZE (1 << (LANCE_LOG_TX_BUFFERS))
181 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
182 #define TX_RING_LEN_BITS ((LANCE_LOG_TX_BUFFERS) << 29)
183 #define TX_NEXT(__x) (((__x)+1) & TX_RING_MOD_MASK)
184
185 #define RX_RING_SIZE (1 << (LANCE_LOG_RX_BUFFERS))
186 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
187 #define RX_RING_LEN_BITS ((LANCE_LOG_RX_BUFFERS) << 29)
188 #define RX_NEXT(__x) (((__x)+1) & RX_RING_MOD_MASK)
189
190 #define PKT_BUF_SZ 1544
191 #define RX_BUFF_SIZE PKT_BUF_SZ
192 #define TX_BUFF_SIZE PKT_BUF_SZ
193
194 struct lance_rx_desc {
195 u16 rmd0; /* low address of packet */
196 u8 rmd1_bits; /* descriptor bits */
197 u8 rmd1_hadr; /* high address of packet */
198 s16 length; /* This length is 2s complement (negative)!
199 * Buffer length
200 */
201 u16 mblength; /* This is the actual number of bytes received */
202 };
203
204 struct lance_tx_desc {
205 u16 tmd0; /* low address of packet */
206 u8 tmd1_bits; /* descriptor bits */
207 u8 tmd1_hadr; /* high address of packet */
208 s16 length; /* Length is 2s complement (negative)! */
209 u16 misc;
210 };
211
212 /* The LANCE initialization block, described in databook. */
213 /* On the Sparc, this block should be on a DMA region */
214 struct lance_init_block {
215 u16 mode; /* Pre-set mode (reg. 15) */
216 u8 phys_addr[6]; /* Physical ethernet address */
217 u32 filter[2]; /* Multicast filter. */
218
219 /* Receive and transmit ring base, along with extra bits. */
220 u16 rx_ptr; /* receive descriptor addr */
221 u16 rx_len; /* receive len and high addr */
222 u16 tx_ptr; /* transmit descriptor addr */
223 u16 tx_len; /* transmit len and high addr */
224
225 /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
226 struct lance_rx_desc brx_ring[RX_RING_SIZE];
227 struct lance_tx_desc btx_ring[TX_RING_SIZE];
228
229 u8 tx_buf [TX_RING_SIZE][TX_BUFF_SIZE];
230 u8 pad[2]; /* align rx_buf for copy_and_sum(). */
231 u8 rx_buf [RX_RING_SIZE][RX_BUFF_SIZE];
232 };
233
234 #define libdesc_offset(rt, elem) \
235 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
236
237 #define libbuff_offset(rt, elem) \
238 ((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem][0])))))
239
240 struct lance_private {
241 void __iomem *lregs; /* Lance RAP/RDP regs. */
242 void __iomem *dregs; /* DMA controller regs. */
243 struct lance_init_block __iomem *init_block_iomem;
244 struct lance_init_block *init_block_mem;
245
246 spinlock_t lock;
247
248 int rx_new, tx_new;
249 int rx_old, tx_old;
250
251 struct platform_device *ledma; /* If set this points to ledma */
252 char tpe; /* cable-selection is TPE */
253 char auto_select; /* cable-selection by carrier */
254 char burst_sizes; /* ledma SBus burst sizes */
255 char pio_buffer; /* init block in PIO space? */
256
257 unsigned short busmaster_regval;
258
259 void (*init_ring)(struct net_device *);
260 void (*rx)(struct net_device *);
261 void (*tx)(struct net_device *);
262
263 char *name;
264 dma_addr_t init_block_dvma;
265 struct net_device *dev; /* Backpointer */
266 struct platform_device *op;
267 struct platform_device *lebuffer;
268 struct timer_list multicast_timer;
269 };
270
271 #define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
272 lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
273 lp->tx_old - lp->tx_new-1)
274
275 /* Lance registers. */
276 #define RDP 0x00UL /* register data port */
277 #define RAP 0x02UL /* register address port */
278 #define LANCE_REG_SIZE 0x04UL
279
280 #define STOP_LANCE(__lp) \
281 do { void __iomem *__base = (__lp)->lregs; \
282 sbus_writew(LE_CSR0, __base + RAP); \
283 sbus_writew(LE_C0_STOP, __base + RDP); \
284 } while (0)
285
286 int sparc_lance_debug = 2;
287
288 /* The Lance uses 24 bit addresses */
289 /* On the Sun4c the DVMA will provide the remaining bytes for us */
290 /* On the Sun4m we have to instruct the ledma to provide them */
291 /* Even worse, on scsi/ether SBUS cards, the init block and the
292 * transmit/receive buffers are addresses as offsets from absolute
293 * zero on the lebuffer PIO area. -DaveM
294 */
295
296 #define LANCE_ADDR(x) ((long)(x) & ~0xff000000)
297
298 /* Load the CSR registers */
299 static void load_csrs(struct lance_private *lp)
300 {
301 u32 leptr;
302
303 if (lp->pio_buffer)
304 leptr = 0;
305 else
306 leptr = LANCE_ADDR(lp->init_block_dvma);
307
308 sbus_writew(LE_CSR1, lp->lregs + RAP);
309 sbus_writew(leptr & 0xffff, lp->lregs + RDP);
310 sbus_writew(LE_CSR2, lp->lregs + RAP);
311 sbus_writew(leptr >> 16, lp->lregs + RDP);
312 sbus_writew(LE_CSR3, lp->lregs + RAP);
313 sbus_writew(lp->busmaster_regval, lp->lregs + RDP);
314
315 /* Point back to csr0 */
316 sbus_writew(LE_CSR0, lp->lregs + RAP);
317 }
318
319 /* Setup the Lance Rx and Tx rings */
320 static void lance_init_ring_dvma(struct net_device *dev)
321 {
322 struct lance_private *lp = netdev_priv(dev);
323 struct lance_init_block *ib = lp->init_block_mem;
324 dma_addr_t aib = lp->init_block_dvma;
325 __u32 leptr;
326 int i;
327
328 /* Lock out other processes while setting up hardware */
329 netif_stop_queue(dev);
330 lp->rx_new = lp->tx_new = 0;
331 lp->rx_old = lp->tx_old = 0;
332
333 /* Copy the ethernet address to the lance init block
334 * Note that on the sparc you need to swap the ethernet address.
335 */
336 ib->phys_addr [0] = dev->dev_addr [1];
337 ib->phys_addr [1] = dev->dev_addr [0];
338 ib->phys_addr [2] = dev->dev_addr [3];
339 ib->phys_addr [3] = dev->dev_addr [2];
340 ib->phys_addr [4] = dev->dev_addr [5];
341 ib->phys_addr [5] = dev->dev_addr [4];
342
343 /* Setup the Tx ring entries */
344 for (i = 0; i < TX_RING_SIZE; i++) {
345 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
346 ib->btx_ring [i].tmd0 = leptr;
347 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
348 ib->btx_ring [i].tmd1_bits = 0;
349 ib->btx_ring [i].length = 0xf000; /* The ones required by tmd2 */
350 ib->btx_ring [i].misc = 0;
351 }
352
353 /* Setup the Rx ring entries */
354 for (i = 0; i < RX_RING_SIZE; i++) {
355 leptr = LANCE_ADDR(aib + libbuff_offset(rx_buf, i));
356
357 ib->brx_ring [i].rmd0 = leptr;
358 ib->brx_ring [i].rmd1_hadr = leptr >> 16;
359 ib->brx_ring [i].rmd1_bits = LE_R1_OWN;
360 ib->brx_ring [i].length = -RX_BUFF_SIZE | 0xf000;
361 ib->brx_ring [i].mblength = 0;
362 }
363
364 /* Setup the initialization block */
365
366 /* Setup rx descriptor pointer */
367 leptr = LANCE_ADDR(aib + libdesc_offset(brx_ring, 0));
368 ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
369 ib->rx_ptr = leptr;
370
371 /* Setup tx descriptor pointer */
372 leptr = LANCE_ADDR(aib + libdesc_offset(btx_ring, 0));
373 ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
374 ib->tx_ptr = leptr;
375 }
376
377 static void lance_init_ring_pio(struct net_device *dev)
378 {
379 struct lance_private *lp = netdev_priv(dev);
380 struct lance_init_block __iomem *ib = lp->init_block_iomem;
381 u32 leptr;
382 int i;
383
384 /* Lock out other processes while setting up hardware */
385 netif_stop_queue(dev);
386 lp->rx_new = lp->tx_new = 0;
387 lp->rx_old = lp->tx_old = 0;
388
389 /* Copy the ethernet address to the lance init block
390 * Note that on the sparc you need to swap the ethernet address.
391 */
392 sbus_writeb(dev->dev_addr[1], &ib->phys_addr[0]);
393 sbus_writeb(dev->dev_addr[0], &ib->phys_addr[1]);
394 sbus_writeb(dev->dev_addr[3], &ib->phys_addr[2]);
395 sbus_writeb(dev->dev_addr[2], &ib->phys_addr[3]);
396 sbus_writeb(dev->dev_addr[5], &ib->phys_addr[4]);
397 sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
398
399 /* Setup the Tx ring entries */
400 for (i = 0; i < TX_RING_SIZE; i++) {
401 leptr = libbuff_offset(tx_buf, i);
402 sbus_writew(leptr, &ib->btx_ring [i].tmd0);
403 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
404 sbus_writeb(0, &ib->btx_ring [i].tmd1_bits);
405
406 /* The ones required by tmd2 */
407 sbus_writew(0xf000, &ib->btx_ring [i].length);
408 sbus_writew(0, &ib->btx_ring [i].misc);
409 }
410
411 /* Setup the Rx ring entries */
412 for (i = 0; i < RX_RING_SIZE; i++) {
413 leptr = libbuff_offset(rx_buf, i);
414
415 sbus_writew(leptr, &ib->brx_ring [i].rmd0);
416 sbus_writeb(leptr >> 16,&ib->brx_ring [i].rmd1_hadr);
417 sbus_writeb(LE_R1_OWN, &ib->brx_ring [i].rmd1_bits);
418 sbus_writew(-RX_BUFF_SIZE|0xf000,
419 &ib->brx_ring [i].length);
420 sbus_writew(0, &ib->brx_ring [i].mblength);
421 }
422
423 /* Setup the initialization block */
424
425 /* Setup rx descriptor pointer */
426 leptr = libdesc_offset(brx_ring, 0);
427 sbus_writew((LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16),
428 &ib->rx_len);
429 sbus_writew(leptr, &ib->rx_ptr);
430
431 /* Setup tx descriptor pointer */
432 leptr = libdesc_offset(btx_ring, 0);
433 sbus_writew((LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16),
434 &ib->tx_len);
435 sbus_writew(leptr, &ib->tx_ptr);
436 }
437
438 static void init_restart_ledma(struct lance_private *lp)
439 {
440 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
441
442 if (!(csr & DMA_HNDL_ERROR)) {
443 /* E-Cache draining */
444 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN)
445 barrier();
446 }
447
448 csr = sbus_readl(lp->dregs + DMA_CSR);
449 csr &= ~DMA_E_BURSTS;
450 if (lp->burst_sizes & DMA_BURST32)
451 csr |= DMA_E_BURST32;
452 else
453 csr |= DMA_E_BURST16;
454
455 csr |= (DMA_DSBL_RD_DRN | DMA_DSBL_WR_INV | DMA_FIFO_INV);
456
457 if (lp->tpe)
458 csr |= DMA_EN_ENETAUI;
459 else
460 csr &= ~DMA_EN_ENETAUI;
461 udelay(20);
462 sbus_writel(csr, lp->dregs + DMA_CSR);
463 udelay(200);
464 }
465
466 static int init_restart_lance(struct lance_private *lp)
467 {
468 u16 regval = 0;
469 int i;
470
471 if (lp->dregs)
472 init_restart_ledma(lp);
473
474 sbus_writew(LE_CSR0, lp->lregs + RAP);
475 sbus_writew(LE_C0_INIT, lp->lregs + RDP);
476
477 /* Wait for the lance to complete initialization */
478 for (i = 0; i < 100; i++) {
479 regval = sbus_readw(lp->lregs + RDP);
480
481 if (regval & (LE_C0_ERR | LE_C0_IDON))
482 break;
483 barrier();
484 }
485 if (i == 100 || (regval & LE_C0_ERR)) {
486 printk(KERN_ERR "LANCE unopened after %d ticks, csr0=%4.4x.\n",
487 i, regval);
488 if (lp->dregs)
489 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR));
490 return -1;
491 }
492
493 /* Clear IDON by writing a "1", enable interrupts and start lance */
494 sbus_writew(LE_C0_IDON, lp->lregs + RDP);
495 sbus_writew(LE_C0_INEA | LE_C0_STRT, lp->lregs + RDP);
496
497 if (lp->dregs) {
498 u32 csr = sbus_readl(lp->dregs + DMA_CSR);
499
500 csr |= DMA_INT_ENAB;
501 sbus_writel(csr, lp->dregs + DMA_CSR);
502 }
503
504 return 0;
505 }
506
507 static void lance_rx_dvma(struct net_device *dev)
508 {
509 struct lance_private *lp = netdev_priv(dev);
510 struct lance_init_block *ib = lp->init_block_mem;
511 struct lance_rx_desc *rd;
512 u8 bits;
513 int len, entry = lp->rx_new;
514 struct sk_buff *skb;
515
516 for (rd = &ib->brx_ring [entry];
517 !((bits = rd->rmd1_bits) & LE_R1_OWN);
518 rd = &ib->brx_ring [entry]) {
519
520 /* We got an incomplete frame? */
521 if ((bits & LE_R1_POK) != LE_R1_POK) {
522 dev->stats.rx_over_errors++;
523 dev->stats.rx_errors++;
524 } else if (bits & LE_R1_ERR) {
525 /* Count only the end frame as a rx error,
526 * not the beginning
527 */
528 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
529 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
530 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
531 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
532 if (bits & LE_R1_EOP) dev->stats.rx_errors++;
533 } else {
534 len = (rd->mblength & 0xfff) - 4;
535 skb = netdev_alloc_skb(dev, len + 2);
536
537 if (skb == NULL) {
538 dev->stats.rx_dropped++;
539 rd->mblength = 0;
540 rd->rmd1_bits = LE_R1_OWN;
541 lp->rx_new = RX_NEXT(entry);
542 return;
543 }
544
545 dev->stats.rx_bytes += len;
546
547 skb_reserve(skb, 2); /* 16 byte align */
548 skb_put(skb, len); /* make room */
549 skb_copy_to_linear_data(skb,
550 (unsigned char *)&(ib->rx_buf [entry][0]),
551 len);
552 skb->protocol = eth_type_trans(skb, dev);
553 netif_rx(skb);
554 dev->stats.rx_packets++;
555 }
556
557 /* Return the packet to the pool */
558 rd->mblength = 0;
559 rd->rmd1_bits = LE_R1_OWN;
560 entry = RX_NEXT(entry);
561 }
562
563 lp->rx_new = entry;
564 }
565
566 static void lance_tx_dvma(struct net_device *dev)
567 {
568 struct lance_private *lp = netdev_priv(dev);
569 struct lance_init_block *ib = lp->init_block_mem;
570 int i, j;
571
572 spin_lock(&lp->lock);
573
574 j = lp->tx_old;
575 for (i = j; i != lp->tx_new; i = j) {
576 struct lance_tx_desc *td = &ib->btx_ring [i];
577 u8 bits = td->tmd1_bits;
578
579 /* If we hit a packet not owned by us, stop */
580 if (bits & LE_T1_OWN)
581 break;
582
583 if (bits & LE_T1_ERR) {
584 u16 status = td->misc;
585
586 dev->stats.tx_errors++;
587 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
588 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
589
590 if (status & LE_T3_CLOS) {
591 dev->stats.tx_carrier_errors++;
592 if (lp->auto_select) {
593 lp->tpe = 1 - lp->tpe;
594 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
595 dev->name, lp->tpe?"TPE":"AUI");
596 STOP_LANCE(lp);
597 lp->init_ring(dev);
598 load_csrs(lp);
599 init_restart_lance(lp);
600 goto out;
601 }
602 }
603
604 /* Buffer errors and underflows turn off the
605 * transmitter, restart the adapter.
606 */
607 if (status & (LE_T3_BUF|LE_T3_UFL)) {
608 dev->stats.tx_fifo_errors++;
609
610 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
611 dev->name);
612 STOP_LANCE(lp);
613 lp->init_ring(dev);
614 load_csrs(lp);
615 init_restart_lance(lp);
616 goto out;
617 }
618 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
619 /*
620 * So we don't count the packet more than once.
621 */
622 td->tmd1_bits = bits & ~(LE_T1_POK);
623
624 /* One collision before packet was sent. */
625 if (bits & LE_T1_EONE)
626 dev->stats.collisions++;
627
628 /* More than one collision, be optimistic. */
629 if (bits & LE_T1_EMORE)
630 dev->stats.collisions += 2;
631
632 dev->stats.tx_packets++;
633 }
634
635 j = TX_NEXT(j);
636 }
637 lp->tx_old = j;
638 out:
639 if (netif_queue_stopped(dev) &&
640 TX_BUFFS_AVAIL > 0)
641 netif_wake_queue(dev);
642
643 spin_unlock(&lp->lock);
644 }
645
646 static void lance_piocopy_to_skb(struct sk_buff *skb, void __iomem *piobuf, int len)
647 {
648 u16 *p16 = (u16 *) skb->data;
649 u32 *p32;
650 u8 *p8;
651 void __iomem *pbuf = piobuf;
652
653 /* We know here that both src and dest are on a 16bit boundary. */
654 *p16++ = sbus_readw(pbuf);
655 p32 = (u32 *) p16;
656 pbuf += 2;
657 len -= 2;
658
659 while (len >= 4) {
660 *p32++ = sbus_readl(pbuf);
661 pbuf += 4;
662 len -= 4;
663 }
664 p8 = (u8 *) p32;
665 if (len >= 2) {
666 p16 = (u16 *) p32;
667 *p16++ = sbus_readw(pbuf);
668 pbuf += 2;
669 len -= 2;
670 p8 = (u8 *) p16;
671 }
672 if (len >= 1)
673 *p8 = sbus_readb(pbuf);
674 }
675
676 static void lance_rx_pio(struct net_device *dev)
677 {
678 struct lance_private *lp = netdev_priv(dev);
679 struct lance_init_block __iomem *ib = lp->init_block_iomem;
680 struct lance_rx_desc __iomem *rd;
681 unsigned char bits;
682 int len, entry;
683 struct sk_buff *skb;
684
685 entry = lp->rx_new;
686 for (rd = &ib->brx_ring [entry];
687 !((bits = sbus_readb(&rd->rmd1_bits)) & LE_R1_OWN);
688 rd = &ib->brx_ring [entry]) {
689
690 /* We got an incomplete frame? */
691 if ((bits & LE_R1_POK) != LE_R1_POK) {
692 dev->stats.rx_over_errors++;
693 dev->stats.rx_errors++;
694 } else if (bits & LE_R1_ERR) {
695 /* Count only the end frame as a rx error,
696 * not the beginning
697 */
698 if (bits & LE_R1_BUF) dev->stats.rx_fifo_errors++;
699 if (bits & LE_R1_CRC) dev->stats.rx_crc_errors++;
700 if (bits & LE_R1_OFL) dev->stats.rx_over_errors++;
701 if (bits & LE_R1_FRA) dev->stats.rx_frame_errors++;
702 if (bits & LE_R1_EOP) dev->stats.rx_errors++;
703 } else {
704 len = (sbus_readw(&rd->mblength) & 0xfff) - 4;
705 skb = netdev_alloc_skb(dev, len + 2);
706
707 if (skb == NULL) {
708 dev->stats.rx_dropped++;
709 sbus_writew(0, &rd->mblength);
710 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
711 lp->rx_new = RX_NEXT(entry);
712 return;
713 }
714
715 dev->stats.rx_bytes += len;
716
717 skb_reserve (skb, 2); /* 16 byte align */
718 skb_put(skb, len); /* make room */
719 lance_piocopy_to_skb(skb, &(ib->rx_buf[entry][0]), len);
720 skb->protocol = eth_type_trans(skb, dev);
721 netif_rx(skb);
722 dev->stats.rx_packets++;
723 }
724
725 /* Return the packet to the pool */
726 sbus_writew(0, &rd->mblength);
727 sbus_writeb(LE_R1_OWN, &rd->rmd1_bits);
728 entry = RX_NEXT(entry);
729 }
730
731 lp->rx_new = entry;
732 }
733
734 static void lance_tx_pio(struct net_device *dev)
735 {
736 struct lance_private *lp = netdev_priv(dev);
737 struct lance_init_block __iomem *ib = lp->init_block_iomem;
738 int i, j;
739
740 spin_lock(&lp->lock);
741
742 j = lp->tx_old;
743 for (i = j; i != lp->tx_new; i = j) {
744 struct lance_tx_desc __iomem *td = &ib->btx_ring [i];
745 u8 bits = sbus_readb(&td->tmd1_bits);
746
747 /* If we hit a packet not owned by us, stop */
748 if (bits & LE_T1_OWN)
749 break;
750
751 if (bits & LE_T1_ERR) {
752 u16 status = sbus_readw(&td->misc);
753
754 dev->stats.tx_errors++;
755 if (status & LE_T3_RTY) dev->stats.tx_aborted_errors++;
756 if (status & LE_T3_LCOL) dev->stats.tx_window_errors++;
757
758 if (status & LE_T3_CLOS) {
759 dev->stats.tx_carrier_errors++;
760 if (lp->auto_select) {
761 lp->tpe = 1 - lp->tpe;
762 printk(KERN_NOTICE "%s: Carrier Lost, trying %s\n",
763 dev->name, lp->tpe?"TPE":"AUI");
764 STOP_LANCE(lp);
765 lp->init_ring(dev);
766 load_csrs(lp);
767 init_restart_lance(lp);
768 goto out;
769 }
770 }
771
772 /* Buffer errors and underflows turn off the
773 * transmitter, restart the adapter.
774 */
775 if (status & (LE_T3_BUF|LE_T3_UFL)) {
776 dev->stats.tx_fifo_errors++;
777
778 printk(KERN_ERR "%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
779 dev->name);
780 STOP_LANCE(lp);
781 lp->init_ring(dev);
782 load_csrs(lp);
783 init_restart_lance(lp);
784 goto out;
785 }
786 } else if ((bits & LE_T1_POK) == LE_T1_POK) {
787 /*
788 * So we don't count the packet more than once.
789 */
790 sbus_writeb(bits & ~(LE_T1_POK), &td->tmd1_bits);
791
792 /* One collision before packet was sent. */
793 if (bits & LE_T1_EONE)
794 dev->stats.collisions++;
795
796 /* More than one collision, be optimistic. */
797 if (bits & LE_T1_EMORE)
798 dev->stats.collisions += 2;
799
800 dev->stats.tx_packets++;
801 }
802
803 j = TX_NEXT(j);
804 }
805 lp->tx_old = j;
806
807 if (netif_queue_stopped(dev) &&
808 TX_BUFFS_AVAIL > 0)
809 netif_wake_queue(dev);
810 out:
811 spin_unlock(&lp->lock);
812 }
813
814 static irqreturn_t lance_interrupt(int irq, void *dev_id)
815 {
816 struct net_device *dev = dev_id;
817 struct lance_private *lp = netdev_priv(dev);
818 int csr0;
819
820 sbus_writew(LE_CSR0, lp->lregs + RAP);
821 csr0 = sbus_readw(lp->lregs + RDP);
822
823 /* Acknowledge all the interrupt sources ASAP */
824 sbus_writew(csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT),
825 lp->lregs + RDP);
826
827 if ((csr0 & LE_C0_ERR) != 0) {
828 /* Clear the error condition */
829 sbus_writew((LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
830 LE_C0_CERR | LE_C0_MERR),
831 lp->lregs + RDP);
832 }
833
834 if (csr0 & LE_C0_RINT)
835 lp->rx(dev);
836
837 if (csr0 & LE_C0_TINT)
838 lp->tx(dev);
839
840 if (csr0 & LE_C0_BABL)
841 dev->stats.tx_errors++;
842
843 if (csr0 & LE_C0_MISS)
844 dev->stats.rx_errors++;
845
846 if (csr0 & LE_C0_MERR) {
847 if (lp->dregs) {
848 u32 addr = sbus_readl(lp->dregs + DMA_ADDR);
849
850 printk(KERN_ERR "%s: Memory error, status %04x, addr %06x\n",
851 dev->name, csr0, addr & 0xffffff);
852 } else {
853 printk(KERN_ERR "%s: Memory error, status %04x\n",
854 dev->name, csr0);
855 }
856
857 sbus_writew(LE_C0_STOP, lp->lregs + RDP);
858
859 if (lp->dregs) {
860 u32 dma_csr = sbus_readl(lp->dregs + DMA_CSR);
861
862 dma_csr |= DMA_FIFO_INV;
863 sbus_writel(dma_csr, lp->dregs + DMA_CSR);
864 }
865
866 lp->init_ring(dev);
867 load_csrs(lp);
868 init_restart_lance(lp);
869 netif_wake_queue(dev);
870 }
871
872 sbus_writew(LE_C0_INEA, lp->lregs + RDP);
873
874 return IRQ_HANDLED;
875 }
876
877 /* Build a fake network packet and send it to ourselves. */
878 static void build_fake_packet(struct lance_private *lp)
879 {
880 struct net_device *dev = lp->dev;
881 int i, entry;
882
883 entry = lp->tx_new & TX_RING_MOD_MASK;
884 if (lp->pio_buffer) {
885 struct lance_init_block __iomem *ib = lp->init_block_iomem;
886 u16 __iomem *packet = (u16 __iomem *) &(ib->tx_buf[entry][0]);
887 struct ethhdr __iomem *eth = (struct ethhdr __iomem *) packet;
888 for (i = 0; i < (ETH_ZLEN / sizeof(u16)); i++)
889 sbus_writew(0, &packet[i]);
890 for (i = 0; i < 6; i++) {
891 sbus_writeb(dev->dev_addr[i], &eth->h_dest[i]);
892 sbus_writeb(dev->dev_addr[i], &eth->h_source[i]);
893 }
894 sbus_writew((-ETH_ZLEN) | 0xf000, &ib->btx_ring[entry].length);
895 sbus_writew(0, &ib->btx_ring[entry].misc);
896 sbus_writeb(LE_T1_POK|LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
897 } else {
898 struct lance_init_block *ib = lp->init_block_mem;
899 u16 *packet = (u16 *) &(ib->tx_buf[entry][0]);
900 struct ethhdr *eth = (struct ethhdr *) packet;
901 memset(packet, 0, ETH_ZLEN);
902 for (i = 0; i < 6; i++) {
903 eth->h_dest[i] = dev->dev_addr[i];
904 eth->h_source[i] = dev->dev_addr[i];
905 }
906 ib->btx_ring[entry].length = (-ETH_ZLEN) | 0xf000;
907 ib->btx_ring[entry].misc = 0;
908 ib->btx_ring[entry].tmd1_bits = (LE_T1_POK|LE_T1_OWN);
909 }
910 lp->tx_new = TX_NEXT(entry);
911 }
912
913 static int lance_open(struct net_device *dev)
914 {
915 struct lance_private *lp = netdev_priv(dev);
916 int status = 0;
917
918 STOP_LANCE(lp);
919
920 if (request_irq(dev->irq, lance_interrupt, IRQF_SHARED,
921 lancestr, (void *) dev)) {
922 printk(KERN_ERR "Lance: Can't get irq %d\n", dev->irq);
923 return -EAGAIN;
924 }
925
926 /* On the 4m, setup the ledma to provide the upper bits for buffers */
927 if (lp->dregs) {
928 u32 regval = lp->init_block_dvma & 0xff000000;
929
930 sbus_writel(regval, lp->dregs + DMA_TEST);
931 }
932
933 /* Set mode and clear multicast filter only at device open,
934 * so that lance_init_ring() called at any error will not
935 * forget multicast filters.
936 *
937 * BTW it is common bug in all lance drivers! --ANK
938 */
939 if (lp->pio_buffer) {
940 struct lance_init_block __iomem *ib = lp->init_block_iomem;
941 sbus_writew(0, &ib->mode);
942 sbus_writel(0, &ib->filter[0]);
943 sbus_writel(0, &ib->filter[1]);
944 } else {
945 struct lance_init_block *ib = lp->init_block_mem;
946 ib->mode = 0;
947 ib->filter [0] = 0;
948 ib->filter [1] = 0;
949 }
950
951 lp->init_ring(dev);
952 load_csrs(lp);
953
954 netif_start_queue(dev);
955
956 status = init_restart_lance(lp);
957 if (!status && lp->auto_select) {
958 build_fake_packet(lp);
959 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
960 }
961
962 return status;
963 }
964
965 static int lance_close(struct net_device *dev)
966 {
967 struct lance_private *lp = netdev_priv(dev);
968
969 netif_stop_queue(dev);
970 del_timer_sync(&lp->multicast_timer);
971
972 STOP_LANCE(lp);
973
974 free_irq(dev->irq, (void *) dev);
975 return 0;
976 }
977
978 static int lance_reset(struct net_device *dev)
979 {
980 struct lance_private *lp = netdev_priv(dev);
981 int status;
982
983 STOP_LANCE(lp);
984
985 /* On the 4m, reset the dma too */
986 if (lp->dregs) {
987 u32 csr, addr;
988
989 printk(KERN_ERR "resetting ledma\n");
990 csr = sbus_readl(lp->dregs + DMA_CSR);
991 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
992 udelay(200);
993 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
994
995 addr = lp->init_block_dvma & 0xff000000;
996 sbus_writel(addr, lp->dregs + DMA_TEST);
997 }
998 lp->init_ring(dev);
999 load_csrs(lp);
1000 netif_trans_update(dev); /* prevent tx timeout */
1001 status = init_restart_lance(lp);
1002 return status;
1003 }
1004
1005 static void lance_piocopy_from_skb(void __iomem *dest, unsigned char *src, int len)
1006 {
1007 void __iomem *piobuf = dest;
1008 u32 *p32;
1009 u16 *p16;
1010 u8 *p8;
1011
1012 switch ((unsigned long)src & 0x3) {
1013 case 0:
1014 p32 = (u32 *) src;
1015 while (len >= 4) {
1016 sbus_writel(*p32, piobuf);
1017 p32++;
1018 piobuf += 4;
1019 len -= 4;
1020 }
1021 src = (char *) p32;
1022 break;
1023 case 1:
1024 case 3:
1025 p8 = (u8 *) src;
1026 while (len >= 4) {
1027 u32 val;
1028
1029 val = p8[0] << 24;
1030 val |= p8[1] << 16;
1031 val |= p8[2] << 8;
1032 val |= p8[3];
1033 sbus_writel(val, piobuf);
1034 p8 += 4;
1035 piobuf += 4;
1036 len -= 4;
1037 }
1038 src = (char *) p8;
1039 break;
1040 case 2:
1041 p16 = (u16 *) src;
1042 while (len >= 4) {
1043 u32 val = p16[0]<<16 | p16[1];
1044 sbus_writel(val, piobuf);
1045 p16 += 2;
1046 piobuf += 4;
1047 len -= 4;
1048 }
1049 src = (char *) p16;
1050 break;
1051 }
1052 if (len >= 2) {
1053 u16 val = src[0] << 8 | src[1];
1054 sbus_writew(val, piobuf);
1055 src += 2;
1056 piobuf += 2;
1057 len -= 2;
1058 }
1059 if (len >= 1)
1060 sbus_writeb(src[0], piobuf);
1061 }
1062
1063 static void lance_piozero(void __iomem *dest, int len)
1064 {
1065 void __iomem *piobuf = dest;
1066
1067 if ((unsigned long)piobuf & 1) {
1068 sbus_writeb(0, piobuf);
1069 piobuf += 1;
1070 len -= 1;
1071 if (len == 0)
1072 return;
1073 }
1074 if (len == 1) {
1075 sbus_writeb(0, piobuf);
1076 return;
1077 }
1078 if ((unsigned long)piobuf & 2) {
1079 sbus_writew(0, piobuf);
1080 piobuf += 2;
1081 len -= 2;
1082 if (len == 0)
1083 return;
1084 }
1085 while (len >= 4) {
1086 sbus_writel(0, piobuf);
1087 piobuf += 4;
1088 len -= 4;
1089 }
1090 if (len >= 2) {
1091 sbus_writew(0, piobuf);
1092 piobuf += 2;
1093 len -= 2;
1094 }
1095 if (len >= 1)
1096 sbus_writeb(0, piobuf);
1097 }
1098
1099 static void lance_tx_timeout(struct net_device *dev)
1100 {
1101 struct lance_private *lp = netdev_priv(dev);
1102
1103 printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
1104 dev->name, sbus_readw(lp->lregs + RDP));
1105 lance_reset(dev);
1106 netif_wake_queue(dev);
1107 }
1108
1109 static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
1110 {
1111 struct lance_private *lp = netdev_priv(dev);
1112 int entry, skblen, len;
1113
1114 skblen = skb->len;
1115
1116 len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
1117
1118 spin_lock_irq(&lp->lock);
1119
1120 dev->stats.tx_bytes += len;
1121
1122 entry = lp->tx_new & TX_RING_MOD_MASK;
1123 if (lp->pio_buffer) {
1124 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1125 sbus_writew((-len) | 0xf000, &ib->btx_ring[entry].length);
1126 sbus_writew(0, &ib->btx_ring[entry].misc);
1127 lance_piocopy_from_skb(&ib->tx_buf[entry][0], skb->data, skblen);
1128 if (len != skblen)
1129 lance_piozero(&ib->tx_buf[entry][skblen], len - skblen);
1130 sbus_writeb(LE_T1_POK | LE_T1_OWN, &ib->btx_ring[entry].tmd1_bits);
1131 } else {
1132 struct lance_init_block *ib = lp->init_block_mem;
1133 ib->btx_ring [entry].length = (-len) | 0xf000;
1134 ib->btx_ring [entry].misc = 0;
1135 skb_copy_from_linear_data(skb, &ib->tx_buf [entry][0], skblen);
1136 if (len != skblen)
1137 memset((char *) &ib->tx_buf [entry][skblen], 0, len - skblen);
1138 ib->btx_ring [entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
1139 }
1140
1141 lp->tx_new = TX_NEXT(entry);
1142
1143 if (TX_BUFFS_AVAIL <= 0)
1144 netif_stop_queue(dev);
1145
1146 /* Kick the lance: transmit now */
1147 sbus_writew(LE_C0_INEA | LE_C0_TDMD, lp->lregs + RDP);
1148
1149 /* Read back CSR to invalidate the E-Cache.
1150 * This is needed, because DMA_DSBL_WR_INV is set.
1151 */
1152 if (lp->dregs)
1153 sbus_readw(lp->lregs + RDP);
1154
1155 spin_unlock_irq(&lp->lock);
1156
1157 dev_kfree_skb(skb);
1158
1159 return NETDEV_TX_OK;
1160 }
1161
1162 /* taken from the depca driver */
1163 static void lance_load_multicast(struct net_device *dev)
1164 {
1165 struct lance_private *lp = netdev_priv(dev);
1166 struct netdev_hw_addr *ha;
1167 u32 crc;
1168 u32 val;
1169
1170 /* set all multicast bits */
1171 if (dev->flags & IFF_ALLMULTI)
1172 val = ~0;
1173 else
1174 val = 0;
1175
1176 if (lp->pio_buffer) {
1177 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1178 sbus_writel(val, &ib->filter[0]);
1179 sbus_writel(val, &ib->filter[1]);
1180 } else {
1181 struct lance_init_block *ib = lp->init_block_mem;
1182 ib->filter [0] = val;
1183 ib->filter [1] = val;
1184 }
1185
1186 if (dev->flags & IFF_ALLMULTI)
1187 return;
1188
1189 /* Add addresses */
1190 netdev_for_each_mc_addr(ha, dev) {
1191 crc = ether_crc_le(6, ha->addr);
1192 crc = crc >> 26;
1193 if (lp->pio_buffer) {
1194 struct lance_init_block __iomem *ib = lp->init_block_iomem;
1195 u16 __iomem *mcast_table = (u16 __iomem *) &ib->filter;
1196 u16 tmp = sbus_readw(&mcast_table[crc>>4]);
1197 tmp |= 1 << (crc & 0xf);
1198 sbus_writew(tmp, &mcast_table[crc>>4]);
1199 } else {
1200 struct lance_init_block *ib = lp->init_block_mem;
1201 u16 *mcast_table = (u16 *) &ib->filter;
1202 mcast_table [crc >> 4] |= 1 << (crc & 0xf);
1203 }
1204 }
1205 }
1206
1207 static void lance_set_multicast(struct net_device *dev)
1208 {
1209 struct lance_private *lp = netdev_priv(dev);
1210 struct lance_init_block *ib_mem = lp->init_block_mem;
1211 struct lance_init_block __iomem *ib_iomem = lp->init_block_iomem;
1212 u16 mode;
1213
1214 if (!netif_running(dev))
1215 return;
1216
1217 if (lp->tx_old != lp->tx_new) {
1218 mod_timer(&lp->multicast_timer, jiffies + 4);
1219 netif_wake_queue(dev);
1220 return;
1221 }
1222
1223 netif_stop_queue(dev);
1224
1225 STOP_LANCE(lp);
1226 lp->init_ring(dev);
1227
1228 if (lp->pio_buffer)
1229 mode = sbus_readw(&ib_iomem->mode);
1230 else
1231 mode = ib_mem->mode;
1232 if (dev->flags & IFF_PROMISC) {
1233 mode |= LE_MO_PROM;
1234 if (lp->pio_buffer)
1235 sbus_writew(mode, &ib_iomem->mode);
1236 else
1237 ib_mem->mode = mode;
1238 } else {
1239 mode &= ~LE_MO_PROM;
1240 if (lp->pio_buffer)
1241 sbus_writew(mode, &ib_iomem->mode);
1242 else
1243 ib_mem->mode = mode;
1244 lance_load_multicast(dev);
1245 }
1246 load_csrs(lp);
1247 init_restart_lance(lp);
1248 netif_wake_queue(dev);
1249 }
1250
1251 static void lance_set_multicast_retry(unsigned long _opaque)
1252 {
1253 struct net_device *dev = (struct net_device *) _opaque;
1254
1255 lance_set_multicast(dev);
1256 }
1257
1258 static void lance_free_hwresources(struct lance_private *lp)
1259 {
1260 if (lp->lregs)
1261 of_iounmap(&lp->op->resource[0], lp->lregs, LANCE_REG_SIZE);
1262 if (lp->dregs) {
1263 struct platform_device *ledma = lp->ledma;
1264
1265 of_iounmap(&ledma->resource[0], lp->dregs,
1266 resource_size(&ledma->resource[0]));
1267 }
1268 if (lp->init_block_iomem) {
1269 of_iounmap(&lp->lebuffer->resource[0], lp->init_block_iomem,
1270 sizeof(struct lance_init_block));
1271 } else if (lp->init_block_mem) {
1272 dma_free_coherent(&lp->op->dev,
1273 sizeof(struct lance_init_block),
1274 lp->init_block_mem,
1275 lp->init_block_dvma);
1276 }
1277 }
1278
1279 /* Ethtool support... */
1280 static void sparc_lance_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1281 {
1282 strlcpy(info->driver, "sunlance", sizeof(info->driver));
1283 strlcpy(info->version, "2.02", sizeof(info->version));
1284 }
1285
1286 static const struct ethtool_ops sparc_lance_ethtool_ops = {
1287 .get_drvinfo = sparc_lance_get_drvinfo,
1288 .get_link = ethtool_op_get_link,
1289 };
1290
1291 static const struct net_device_ops sparc_lance_ops = {
1292 .ndo_open = lance_open,
1293 .ndo_stop = lance_close,
1294 .ndo_start_xmit = lance_start_xmit,
1295 .ndo_set_rx_mode = lance_set_multicast,
1296 .ndo_tx_timeout = lance_tx_timeout,
1297 .ndo_set_mac_address = eth_mac_addr,
1298 .ndo_validate_addr = eth_validate_addr,
1299 };
1300
1301 static int sparc_lance_probe_one(struct platform_device *op,
1302 struct platform_device *ledma,
1303 struct platform_device *lebuffer)
1304 {
1305 struct device_node *dp = op->dev.of_node;
1306 static unsigned version_printed;
1307 struct lance_private *lp;
1308 struct net_device *dev;
1309 int i;
1310
1311 dev = alloc_etherdev(sizeof(struct lance_private) + 8);
1312 if (!dev)
1313 return -ENOMEM;
1314
1315 lp = netdev_priv(dev);
1316
1317 if (sparc_lance_debug && version_printed++ == 0)
1318 printk (KERN_INFO "%s", version);
1319
1320 spin_lock_init(&lp->lock);
1321
1322 /* Copy the IDPROM ethernet address to the device structure, later we
1323 * will copy the address in the device structure to the lance
1324 * initialization block.
1325 */
1326 for (i = 0; i < 6; i++)
1327 dev->dev_addr[i] = idprom->id_ethaddr[i];
1328
1329 /* Get the IO region */
1330 lp->lregs = of_ioremap(&op->resource[0], 0,
1331 LANCE_REG_SIZE, lancestr);
1332 if (!lp->lregs) {
1333 printk(KERN_ERR "SunLance: Cannot map registers.\n");
1334 goto fail;
1335 }
1336
1337 lp->ledma = ledma;
1338 if (lp->ledma) {
1339 lp->dregs = of_ioremap(&ledma->resource[0], 0,
1340 resource_size(&ledma->resource[0]),
1341 "ledma");
1342 if (!lp->dregs) {
1343 printk(KERN_ERR "SunLance: Cannot map "
1344 "ledma registers.\n");
1345 goto fail;
1346 }
1347 }
1348
1349 lp->op = op;
1350 lp->lebuffer = lebuffer;
1351 if (lebuffer) {
1352 /* sanity check */
1353 if (lebuffer->resource[0].start & 7) {
1354 printk(KERN_ERR "SunLance: ERROR: Rx and Tx rings not on even boundary.\n");
1355 goto fail;
1356 }
1357 lp->init_block_iomem =
1358 of_ioremap(&lebuffer->resource[0], 0,
1359 sizeof(struct lance_init_block), "lebuffer");
1360 if (!lp->init_block_iomem) {
1361 printk(KERN_ERR "SunLance: Cannot map PIO buffer.\n");
1362 goto fail;
1363 }
1364 lp->init_block_dvma = 0;
1365 lp->pio_buffer = 1;
1366 lp->init_ring = lance_init_ring_pio;
1367 lp->rx = lance_rx_pio;
1368 lp->tx = lance_tx_pio;
1369 } else {
1370 lp->init_block_mem =
1371 dma_alloc_coherent(&op->dev,
1372 sizeof(struct lance_init_block),
1373 &lp->init_block_dvma, GFP_ATOMIC);
1374 if (!lp->init_block_mem)
1375 goto fail;
1376
1377 lp->pio_buffer = 0;
1378 lp->init_ring = lance_init_ring_dvma;
1379 lp->rx = lance_rx_dvma;
1380 lp->tx = lance_tx_dvma;
1381 }
1382 lp->busmaster_regval = of_getintprop_default(dp, "busmaster-regval",
1383 (LE_C3_BSWP |
1384 LE_C3_ACON |
1385 LE_C3_BCON));
1386
1387 lp->name = lancestr;
1388
1389 lp->burst_sizes = 0;
1390 if (lp->ledma) {
1391 struct device_node *ledma_dp = ledma->dev.of_node;
1392 struct device_node *sbus_dp;
1393 unsigned int sbmask;
1394 const char *prop;
1395 u32 csr;
1396
1397 /* Find burst-size property for ledma */
1398 lp->burst_sizes = of_getintprop_default(ledma_dp,
1399 "burst-sizes", 0);
1400
1401 /* ledma may be capable of fast bursts, but sbus may not. */
1402 sbus_dp = ledma_dp->parent;
1403 sbmask = of_getintprop_default(sbus_dp, "burst-sizes",
1404 DMA_BURSTBITS);
1405 lp->burst_sizes &= sbmask;
1406
1407 /* Get the cable-selection property */
1408 prop = of_get_property(ledma_dp, "cable-selection", NULL);
1409 if (!prop || prop[0] == '\0') {
1410 struct device_node *nd;
1411
1412 printk(KERN_INFO "SunLance: using "
1413 "auto-carrier-detection.\n");
1414
1415 nd = of_find_node_by_path("/options");
1416 if (!nd)
1417 goto no_link_test;
1418
1419 prop = of_get_property(nd, "tpe-link-test?", NULL);
1420 if (!prop)
1421 goto no_link_test;
1422
1423 if (strcmp(prop, "true")) {
1424 printk(KERN_NOTICE "SunLance: warning: overriding option "
1425 "'tpe-link-test?'\n");
1426 printk(KERN_NOTICE "SunLance: warning: mail any problems "
1427 "to ecd@skynet.be\n");
1428 auxio_set_lte(AUXIO_LTE_ON);
1429 }
1430 no_link_test:
1431 lp->auto_select = 1;
1432 lp->tpe = 0;
1433 } else if (!strcmp(prop, "aui")) {
1434 lp->auto_select = 0;
1435 lp->tpe = 0;
1436 } else {
1437 lp->auto_select = 0;
1438 lp->tpe = 1;
1439 }
1440
1441 /* Reset ledma */
1442 csr = sbus_readl(lp->dregs + DMA_CSR);
1443 sbus_writel(csr | DMA_RST_ENET, lp->dregs + DMA_CSR);
1444 udelay(200);
1445 sbus_writel(csr & ~DMA_RST_ENET, lp->dregs + DMA_CSR);
1446 } else
1447 lp->dregs = NULL;
1448
1449 lp->dev = dev;
1450 SET_NETDEV_DEV(dev, &op->dev);
1451 dev->watchdog_timeo = 5*HZ;
1452 dev->ethtool_ops = &sparc_lance_ethtool_ops;
1453 dev->netdev_ops = &sparc_lance_ops;
1454
1455 dev->irq = op->archdata.irqs[0];
1456
1457 /* We cannot sleep if the chip is busy during a
1458 * multicast list update event, because such events
1459 * can occur from interrupts (ex. IPv6). So we
1460 * use a timer to try again later when necessary. -DaveM
1461 */
1462 init_timer(&lp->multicast_timer);
1463 lp->multicast_timer.data = (unsigned long) dev;
1464 lp->multicast_timer.function = lance_set_multicast_retry;
1465
1466 if (register_netdev(dev)) {
1467 printk(KERN_ERR "SunLance: Cannot register device.\n");
1468 goto fail;
1469 }
1470
1471 platform_set_drvdata(op, lp);
1472
1473 printk(KERN_INFO "%s: LANCE %pM\n",
1474 dev->name, dev->dev_addr);
1475
1476 return 0;
1477
1478 fail:
1479 lance_free_hwresources(lp);
1480 free_netdev(dev);
1481 return -ENODEV;
1482 }
1483
1484 static int sunlance_sbus_probe(struct platform_device *op)
1485 {
1486 struct platform_device *parent = to_platform_device(op->dev.parent);
1487 struct device_node *parent_dp = parent->dev.of_node;
1488 int err;
1489
1490 if (!strcmp(parent_dp->name, "ledma")) {
1491 err = sparc_lance_probe_one(op, parent, NULL);
1492 } else if (!strcmp(parent_dp->name, "lebuffer")) {
1493 err = sparc_lance_probe_one(op, NULL, parent);
1494 } else
1495 err = sparc_lance_probe_one(op, NULL, NULL);
1496
1497 return err;
1498 }
1499
1500 static int sunlance_sbus_remove(struct platform_device *op)
1501 {
1502 struct lance_private *lp = platform_get_drvdata(op);
1503 struct net_device *net_dev = lp->dev;
1504
1505 unregister_netdev(net_dev);
1506
1507 lance_free_hwresources(lp);
1508
1509 free_netdev(net_dev);
1510
1511 return 0;
1512 }
1513
1514 static const struct of_device_id sunlance_sbus_match[] = {
1515 {
1516 .name = "le",
1517 },
1518 {},
1519 };
1520
1521 MODULE_DEVICE_TABLE(of, sunlance_sbus_match);
1522
1523 static struct platform_driver sunlance_sbus_driver = {
1524 .driver = {
1525 .name = "sunlance",
1526 .of_match_table = sunlance_sbus_match,
1527 },
1528 .probe = sunlance_sbus_probe,
1529 .remove = sunlance_sbus_remove,
1530 };
1531
1532 module_platform_driver(sunlance_sbus_driver);
Linux with added FPC-III support