2 * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
15 #include <linux/clk.h>
16 #include <linux/i2c.h>
17 #include <linux/interrupt.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
22 #define UNIPHIER_I2C_DTRM 0x00 /* TX register */
23 #define UNIPHIER_I2C_DTRM_IRQEN BIT(11) /* enable interrupt */
24 #define UNIPHIER_I2C_DTRM_STA BIT(10) /* start condition */
25 #define UNIPHIER_I2C_DTRM_STO BIT(9) /* stop condition */
26 #define UNIPHIER_I2C_DTRM_NACK BIT(8) /* do not return ACK */
27 #define UNIPHIER_I2C_DTRM_RD BIT(0) /* read transaction */
28 #define UNIPHIER_I2C_DREC 0x04 /* RX register */
29 #define UNIPHIER_I2C_DREC_MST BIT(14) /* 1 = master, 0 = slave */
30 #define UNIPHIER_I2C_DREC_TX BIT(13) /* 1 = transmit, 0 = receive */
31 #define UNIPHIER_I2C_DREC_STS BIT(12) /* stop condition detected */
32 #define UNIPHIER_I2C_DREC_LRB BIT(11) /* no ACK */
33 #define UNIPHIER_I2C_DREC_LAB BIT(9) /* arbitration lost */
34 #define UNIPHIER_I2C_DREC_BBN BIT(8) /* bus not busy */
35 #define UNIPHIER_I2C_MYAD 0x08 /* slave address */
36 #define UNIPHIER_I2C_CLK 0x0c /* clock frequency control */
37 #define UNIPHIER_I2C_BRST 0x10 /* bus reset */
38 #define UNIPHIER_I2C_BRST_FOEN BIT(1) /* normal operation */
39 #define UNIPHIER_I2C_BRST_RSCL BIT(0) /* release SCL */
40 #define UNIPHIER_I2C_HOLD 0x14 /* hold time control */
41 #define UNIPHIER_I2C_BSTS 0x18 /* bus status monitor */
42 #define UNIPHIER_I2C_BSTS_SDA BIT(1) /* readback of SDA line */
43 #define UNIPHIER_I2C_BSTS_SCL BIT(0) /* readback of SCL line */
44 #define UNIPHIER_I2C_NOISE 0x1c /* noise filter control */
45 #define UNIPHIER_I2C_SETUP 0x20 /* setup time control */
47 #define UNIPHIER_I2C_DEFAULT_SPEED 100000
48 #define UNIPHIER_I2C_MAX_SPEED 400000
50 struct uniphier_i2c_priv
{
51 struct completion comp
;
52 struct i2c_adapter adap
;
53 void __iomem
*membase
;
55 unsigned int busy_cnt
;
56 unsigned int clk_cycle
;
59 static irqreturn_t
uniphier_i2c_interrupt(int irq
, void *dev_id
)
61 struct uniphier_i2c_priv
*priv
= dev_id
;
64 * This hardware uses edge triggered interrupt. Do not touch the
65 * hardware registers in this handler to make sure to catch the next
66 * interrupt edge. Just send a complete signal and return.
68 complete(&priv
->comp
);
73 static int uniphier_i2c_xfer_byte(struct i2c_adapter
*adap
, u32 txdata
,
76 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
77 unsigned long time_left
;
80 reinit_completion(&priv
->comp
);
82 txdata
|= UNIPHIER_I2C_DTRM_IRQEN
;
83 dev_dbg(&adap
->dev
, "write data: 0x%04x\n", txdata
);
84 writel(txdata
, priv
->membase
+ UNIPHIER_I2C_DTRM
);
86 time_left
= wait_for_completion_timeout(&priv
->comp
, adap
->timeout
);
87 if (unlikely(!time_left
)) {
88 dev_err(&adap
->dev
, "transaction timeout\n");
92 rxdata
= readl(priv
->membase
+ UNIPHIER_I2C_DREC
);
93 dev_dbg(&adap
->dev
, "read data: 0x%04x\n", rxdata
);
101 static int uniphier_i2c_send_byte(struct i2c_adapter
*adap
, u32 txdata
)
106 ret
= uniphier_i2c_xfer_byte(adap
, txdata
, &rxdata
);
110 if (unlikely(rxdata
& UNIPHIER_I2C_DREC_LAB
)) {
111 dev_dbg(&adap
->dev
, "arbitration lost\n");
114 if (unlikely(rxdata
& UNIPHIER_I2C_DREC_LRB
)) {
115 dev_dbg(&adap
->dev
, "could not get ACK\n");
122 static int uniphier_i2c_tx(struct i2c_adapter
*adap
, u16 addr
, u16 len
,
127 dev_dbg(&adap
->dev
, "start condition\n");
128 ret
= uniphier_i2c_send_byte(adap
, addr
<< 1 |
129 UNIPHIER_I2C_DTRM_STA
|
130 UNIPHIER_I2C_DTRM_NACK
);
135 ret
= uniphier_i2c_send_byte(adap
,
136 UNIPHIER_I2C_DTRM_NACK
| *buf
++);
144 static int uniphier_i2c_rx(struct i2c_adapter
*adap
, u16 addr
, u16 len
,
149 dev_dbg(&adap
->dev
, "start condition\n");
150 ret
= uniphier_i2c_send_byte(adap
, addr
<< 1 |
151 UNIPHIER_I2C_DTRM_STA
|
152 UNIPHIER_I2C_DTRM_NACK
|
153 UNIPHIER_I2C_DTRM_RD
);
160 ret
= uniphier_i2c_xfer_byte(adap
,
161 len
? 0 : UNIPHIER_I2C_DTRM_NACK
,
171 static int uniphier_i2c_stop(struct i2c_adapter
*adap
)
173 dev_dbg(&adap
->dev
, "stop condition\n");
174 return uniphier_i2c_send_byte(adap
, UNIPHIER_I2C_DTRM_STO
|
175 UNIPHIER_I2C_DTRM_NACK
);
178 static int uniphier_i2c_master_xfer_one(struct i2c_adapter
*adap
,
179 struct i2c_msg
*msg
, bool stop
)
181 bool is_read
= msg
->flags
& I2C_M_RD
;
182 bool recovery
= false;
185 dev_dbg(&adap
->dev
, "%s: addr=0x%02x, len=%d, stop=%d\n",
186 is_read
? "receive" : "transmit", msg
->addr
, msg
->len
, stop
);
189 ret
= uniphier_i2c_rx(adap
, msg
->addr
, msg
->len
, msg
->buf
);
191 ret
= uniphier_i2c_tx(adap
, msg
->addr
, msg
->len
, msg
->buf
);
193 if (ret
== -EAGAIN
) /* could not acquire bus. bail out without STOP */
196 if (ret
== -ETIMEDOUT
) {
197 /* This error is fatal. Needs recovery. */
203 int ret2
= uniphier_i2c_stop(adap
);
206 /* Failed to issue STOP. The bus needs recovery. */
213 i2c_recover_bus(adap
);
218 static int uniphier_i2c_check_bus_busy(struct i2c_adapter
*adap
)
220 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
222 if (!(readl(priv
->membase
+ UNIPHIER_I2C_DREC
) &
223 UNIPHIER_I2C_DREC_BBN
)) {
224 if (priv
->busy_cnt
++ > 3) {
226 * If bus busy continues too long, it is probably
227 * in a wrong state. Try bus recovery.
229 i2c_recover_bus(adap
);
240 static int uniphier_i2c_master_xfer(struct i2c_adapter
*adap
,
241 struct i2c_msg
*msgs
, int num
)
243 struct i2c_msg
*msg
, *emsg
= msgs
+ num
;
246 ret
= uniphier_i2c_check_bus_busy(adap
);
250 for (msg
= msgs
; msg
< emsg
; msg
++) {
251 /* If next message is read, skip the stop condition */
252 bool stop
= !(msg
+ 1 < emsg
&& msg
[1].flags
& I2C_M_RD
);
253 /* but, force it if I2C_M_STOP is set */
254 if (msg
->flags
& I2C_M_STOP
)
257 ret
= uniphier_i2c_master_xfer_one(adap
, msg
, stop
);
265 static u32
uniphier_i2c_functionality(struct i2c_adapter
*adap
)
267 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
270 static const struct i2c_algorithm uniphier_i2c_algo
= {
271 .master_xfer
= uniphier_i2c_master_xfer
,
272 .functionality
= uniphier_i2c_functionality
,
275 static void uniphier_i2c_reset(struct uniphier_i2c_priv
*priv
, bool reset_on
)
277 u32 val
= UNIPHIER_I2C_BRST_RSCL
;
279 val
|= reset_on
? 0 : UNIPHIER_I2C_BRST_FOEN
;
280 writel(val
, priv
->membase
+ UNIPHIER_I2C_BRST
);
283 static int uniphier_i2c_get_scl(struct i2c_adapter
*adap
)
285 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
287 return !!(readl(priv
->membase
+ UNIPHIER_I2C_BSTS
) &
288 UNIPHIER_I2C_BSTS_SCL
);
291 static void uniphier_i2c_set_scl(struct i2c_adapter
*adap
, int val
)
293 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
295 writel(val
? UNIPHIER_I2C_BRST_RSCL
: 0,
296 priv
->membase
+ UNIPHIER_I2C_BRST
);
299 static int uniphier_i2c_get_sda(struct i2c_adapter
*adap
)
301 struct uniphier_i2c_priv
*priv
= i2c_get_adapdata(adap
);
303 return !!(readl(priv
->membase
+ UNIPHIER_I2C_BSTS
) &
304 UNIPHIER_I2C_BSTS_SDA
);
307 static void uniphier_i2c_unprepare_recovery(struct i2c_adapter
*adap
)
309 uniphier_i2c_reset(i2c_get_adapdata(adap
), false);
312 static struct i2c_bus_recovery_info uniphier_i2c_bus_recovery_info
= {
313 .recover_bus
= i2c_generic_scl_recovery
,
314 .get_scl
= uniphier_i2c_get_scl
,
315 .set_scl
= uniphier_i2c_set_scl
,
316 .get_sda
= uniphier_i2c_get_sda
,
317 .unprepare_recovery
= uniphier_i2c_unprepare_recovery
,
320 static void uniphier_i2c_hw_init(struct uniphier_i2c_priv
*priv
)
322 unsigned int cyc
= priv
->clk_cycle
;
324 uniphier_i2c_reset(priv
, true);
326 writel((cyc
/ 2 << 16) | cyc
, priv
->membase
+ UNIPHIER_I2C_CLK
);
328 uniphier_i2c_reset(priv
, false);
331 static int uniphier_i2c_probe(struct platform_device
*pdev
)
333 struct device
*dev
= &pdev
->dev
;
334 struct uniphier_i2c_priv
*priv
;
335 struct resource
*regs
;
337 unsigned long clk_rate
;
340 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
344 regs
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
345 priv
->membase
= devm_ioremap_resource(dev
, regs
);
346 if (IS_ERR(priv
->membase
))
347 return PTR_ERR(priv
->membase
);
349 irq
= platform_get_irq(pdev
, 0);
351 dev_err(dev
, "failed to get IRQ number\n");
355 if (of_property_read_u32(dev
->of_node
, "clock-frequency", &bus_speed
))
356 bus_speed
= UNIPHIER_I2C_DEFAULT_SPEED
;
358 if (!bus_speed
|| bus_speed
> UNIPHIER_I2C_MAX_SPEED
) {
359 dev_err(dev
, "invalid clock-frequency %d\n", bus_speed
);
363 priv
->clk
= devm_clk_get(dev
, NULL
);
364 if (IS_ERR(priv
->clk
)) {
365 dev_err(dev
, "failed to get clock\n");
366 return PTR_ERR(priv
->clk
);
369 ret
= clk_prepare_enable(priv
->clk
);
373 clk_rate
= clk_get_rate(priv
->clk
);
375 dev_err(dev
, "input clock rate should not be zero\n");
380 priv
->clk_cycle
= clk_rate
/ bus_speed
;
381 init_completion(&priv
->comp
);
382 priv
->adap
.owner
= THIS_MODULE
;
383 priv
->adap
.algo
= &uniphier_i2c_algo
;
384 priv
->adap
.dev
.parent
= dev
;
385 priv
->adap
.dev
.of_node
= dev
->of_node
;
386 strlcpy(priv
->adap
.name
, "UniPhier I2C", sizeof(priv
->adap
.name
));
387 priv
->adap
.bus_recovery_info
= &uniphier_i2c_bus_recovery_info
;
388 i2c_set_adapdata(&priv
->adap
, priv
);
389 platform_set_drvdata(pdev
, priv
);
391 uniphier_i2c_hw_init(priv
);
393 ret
= devm_request_irq(dev
, irq
, uniphier_i2c_interrupt
, 0, pdev
->name
,
396 dev_err(dev
, "failed to request irq %d\n", irq
);
400 ret
= i2c_add_adapter(&priv
->adap
);
403 clk_disable_unprepare(priv
->clk
);
408 static int uniphier_i2c_remove(struct platform_device
*pdev
)
410 struct uniphier_i2c_priv
*priv
= platform_get_drvdata(pdev
);
412 i2c_del_adapter(&priv
->adap
);
413 clk_disable_unprepare(priv
->clk
);
418 static int __maybe_unused
uniphier_i2c_suspend(struct device
*dev
)
420 struct uniphier_i2c_priv
*priv
= dev_get_drvdata(dev
);
422 clk_disable_unprepare(priv
->clk
);
427 static int __maybe_unused
uniphier_i2c_resume(struct device
*dev
)
429 struct uniphier_i2c_priv
*priv
= dev_get_drvdata(dev
);
432 ret
= clk_prepare_enable(priv
->clk
);
436 uniphier_i2c_hw_init(priv
);
441 static const struct dev_pm_ops uniphier_i2c_pm_ops
= {
442 SET_SYSTEM_SLEEP_PM_OPS(uniphier_i2c_suspend
, uniphier_i2c_resume
)
445 static const struct of_device_id uniphier_i2c_match
[] = {
446 { .compatible
= "socionext,uniphier-i2c" },
449 MODULE_DEVICE_TABLE(of
, uniphier_i2c_match
);
451 static struct platform_driver uniphier_i2c_drv
= {
452 .probe
= uniphier_i2c_probe
,
453 .remove
= uniphier_i2c_remove
,
455 .name
= "uniphier-i2c",
456 .of_match_table
= uniphier_i2c_match
,
457 .pm
= &uniphier_i2c_pm_ops
,
460 module_platform_driver(uniphier_i2c_drv
);
462 MODULE_AUTHOR("Masahiro Yamada <yamada.masahiro@socionext.com>");
463 MODULE_DESCRIPTION("UniPhier I2C bus driver");
464 MODULE_LICENSE("GPL");