| commit | 3e7a76b290f12668e5a57d2f7796f789d4317bc3 | |
| author | Marc Zyngier <marc.zyngier@arm.com> | |
| Tue, 2 May 2017 13:30:39 +0000 (2 14:30 +0100) | ||
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | |
| Wed, 14 Jun 2017 13:05:56 +0000 (14 15:05 +0200) | ||
| tree | 305799d1a95e25c72e33cc663d58d2b722cd9948 | treesnapshot (tar.gz zip) |
| parent | 2a5c08a4d3fef6bc645c2ae0607f00672e367f75 | commitdiff |
KVM: arm/arm64: vgic-v2: Do not use Active+Pending state for a HW interrupt
commit ddf42d068f8802de122bb7efdfcb3179336053f1 upstream.
When an interrupt is injected with the HW bit set (indicating that
deactivation should be propagated to the physical distributor),
special care must be taken so that we never mark the corresponding
LR with the Active+Pending state (as the pending state is kept in
the physycal distributor).
Cc: stable@vger.kernel.org
Fixes: 140b086dd197 ("KVM: arm/arm64: vgic-new: Add GICv2 world switch backend")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
commit ddf42d068f8802de122bb7efdfcb3179336053f1 upstream.
When an interrupt is injected with the HW bit set (indicating that
deactivation should be propagated to the physical distributor),
special care must be taken so that we never mark the corresponding
LR with the Active+Pending state (as the pending state is kept in
the physycal distributor).
Cc: stable@vger.kernel.org
Fixes: 140b086dd197 ("KVM: arm/arm64: vgic-new: Add GICv2 world switch backend")
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Christoffer Dall <cdall@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| virt/kvm/arm/vgic/vgic-v2.c | diffblobblamehistory |