| commit | 430155d430dd1496ecaebc8035c79dc5506ae4f5 | |
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | |
| Mon, 5 Apr 2010 21:03:51 +0000 (5 14:03 -0700) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Mon, 2 Aug 2010 17:30:04 +0000 (2 10:30 -0700) | ||
| tree | c3917d6753f66c921b792be9274eaedb40b3de76 | treesnapshot (tar.gz zip) |
| parent | aa9d89cdfcd0ca32a36be9235023c7889c4b6b0b | commitdiff |
drm/i915: don't queue flips during a flip pending event
commit 83f7fd055eb3f1e843803cd906179d309553967b upstream.
Hardware will set the flip pending ISR bit as soon as it receives the
flip instruction, and (supposedly) clear it once the flip completes
(e.g. at the next vblank). If we try to send down a flip instruction
while the ISR bit is set, the hardware can become very confused, and we
may never receive the corresponding flip pending interrupt, effectively
hanging the chip.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit 83f7fd055eb3f1e843803cd906179d309553967b upstream.
Hardware will set the flip pending ISR bit as soon as it receives the
flip instruction, and (supposedly) clear it once the flip completes
(e.g. at the next vblank). If we try to send down a flip instruction
while the ISR bit is set, the hardware can become very confused, and we
may never receive the corresponding flip pending interrupt, effectively
hanging the chip.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| drivers/gpu/drm/i915/intel_display.c | diffblobblamehistory |