gpio: Fix irqchip initialization order
commit48057ed1840fde9239b1e000bea1a0a1f07c5e99
authorLinus Walleij <linus.walleij@linaro.org>
Tue, 20 Aug 2019 08:05:27 +0000 (20 10:05 +0200)
committerLinus Walleij <linus.walleij@linaro.org>
Fri, 23 Aug 2019 09:00:43 +0000 (23 11:00 +0200)
treec45b458e90e8f888a9fc9d48df86c345a6226026
parentdf451f83e1fc0fa3764a2724b0faaaf9d07ab1b6
gpio: Fix irqchip initialization order

The new API for registering a gpio_irq_chip along with a
gpio_chip has a different semantic ordering than the old
API which added the irqchip explicitly after registering
the gpio_chip.

Move the calls to add the gpio_irq_chip *last* in the
function, so that the different hooks setting up OF and
ACPI and machine gpio_chips are called *before* we try
to register the interrupts, preserving the elder semantic
order.

This cropped up in the PL061 driver which used to work
fine with no special ACPI quirks, but started to misbehave
using the new API.

Fixes: e0d897289813 ("gpio: Implement tighter IRQ chip integration")
Cc: Thierry Reding <treding@nvidia.com>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Cc: Andy Shevchenko <andy.shevchenko@gmail.com>
Reported-by: Wei Xu <xuwei5@hisilicon.com>
Tested-by: Wei Xu <xuwei5@hisilicon.com>
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20190820080527.11796-1-linus.walleij@linaro.org
drivers/gpio/gpiolib.c