| commit | 55de0f31df1a31b346edfe98d061f11162ff1ad4 | |
| author | Jernej Skrabec <jernej.skrabec@siol.net> | |
| Thu, 1 Mar 2018 21:34:30 +0000 (1 22:34 +0100) | ||
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | |
| Fri, 2 Mar 2018 07:42:30 +0000 (2 08:42 +0100) | ||
| tree | 89a6fb0dccd43e1e06aa8dc451bdbe5512d53617 | treesnapshot (tar.gz zip) |
| parent | b1a1ad4b75b876ccf200f2351ae61364bf856613 | commitdiff |
clk: sunxi-ng: h3: h5: export CLK_PLL_VIDEO
CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible
PHY clock parent.
Export it so it can be used later in DT.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
CLK_PLL_VIDEO needs to be referenced in HDMI DT entry as a possible
PHY clock parent.
Export it so it can be used later in DT.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
| drivers/clk/sunxi-ng/ccu-sun8i-h3.h | diffblobblamehistory | |
| include/dt-bindings/clock/sun8i-h3-ccu.h | diffblobblamehistory |