drm/radeon: fix PLLs on RS880 and older v2
commit72edd83cc9e5819ed1ee771519143d7594e059f0
authorChristian König <christian.koenig@amd.com>
Thu, 29 Jan 2015 15:01:03 +0000 (29 16:01 +0100)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 2 Feb 2015 16:39:33 +0000 (2 11:39 -0500)
treec3ea01e726c16e1c43a00fe76131966df24a929a
parenta78b80f51e57273961c397b5e9e224860228b965
drm/radeon: fix PLLs on RS880 and older v2

This is a workaround for RS880 and older chips which seem to have
an additional limit on the minimum PLL input frequency.

v2: fix signed/unsigned warning

bugs:
https://bugzilla.kernel.org/show_bug.cgi?id=91861
https://bugzilla.kernel.org/show_bug.cgi?id=83461

Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
drivers/gpu/drm/radeon/radeon_display.c