x86-64: Calgary IOMMU: Fix off by one when calculating register space location

x86-64: Calgary IOMMU: Fix off by one when calculating register space location

This patch has already been submitted for inclusion in the 2.6.19
tree, but not backported to the 2.6.18.  Please pull the bug fix
below into the stable tree for the 2.6.18.1 release.

The purpose of the code being modified is to determine the location
of the calgary chip address space.  This is done by a magical formula
of FE0MB-8MB*OneBasedChassisNumber+1MB*(RioNodeId-ChassisBase) to
find the offset where BIOS puts it.  In this formula,
OneBasedChassisNumber corresponds to the NUMA node, and rionodeid is
always 2 or 3 depending on which chip in the system it is.  The
problem was that we had an off by one error that caused us to account
some busses to the wrong chip and thus give them the wrong address
space.

Fixes RH bugzilla #203971.

Signed-off-by: Jon Mason <jdmason@kudzu.us>
Signed-off-by: Muli Ben-Yehuda <muli@il.ibm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>