drm/i915/dp: Extend BDW DP audio workaround to GEN9 platforms
commit8c8fdc68329594fd27670a2868b7d63c16c24cfd
authorDhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Wed, 2 Nov 2016 20:13:21 +0000 (2 13:13 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 18 Nov 2016 09:51:48 +0000 (18 10:51 +0100)
tree3acc14ddbe43a97891bd6d35ac47b4fab33ce62d
parentdb8e005bf2ba584b536bd0e6e8a8751e5453c028
drm/i915/dp: Extend BDW DP audio workaround to GEN9 platforms

commit 61e0c5438866d0e737937fc35d752538960e1e9f upstream.

According to BSpec, cdclk for BDW has to be not less than 432 MHz with DP
audio enabled, port width x4, and link rate HBR2 (5.4 GHz). With cdclk less
than 432 MHz, enabling audio leads to pipe FIFO underruns and displays
cycling on/off.

Let's apply this work around to GEN9 platforms too, as it fixes the same
issue.

v2: Move drm_device to drm_i915_private conversion

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97907
Cc: Libin Yang <libin.yang@linux.intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1478117601-19122-1-git-send-email-dhinakaran.pandiyan@intel.com
(cherry picked from commit 9c7540241885838cfc7fa58c4a8bd75be0303ed1)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/gpu/drm/i915/intel_display.c