| commit | 8c94017dc1f59e33636238d16afdf3848e5e57c7 | |
| author | Nithin Nayak Sujir <nsujir@broadcom.com> | |
| Mon, 14 Jan 2013 17:11:00 +0000 (14 17:11 +0000) | ||
| committer | Ben Hutchings <ben@decadent.org.uk> | |
| Wed, 20 Feb 2013 03:15:39 +0000 (20 03:15 +0000) | ||
| tree | 19c9c1d14ad7c6b42eb28d247c447807fc6e166a | treesnapshot (tar.gz zip) |
| parent | ac7551bedf950ef638df23badb0df0a7ca8045fd | commitdiff |
tg3: Fix crc errors on jumbo frame receive
[ Upstream commit daf3ec688e057f6060fb9bb0819feac7a8bbf45c ]
TG3_PHY_AUXCTL_SMDSP_ENABLE/DISABLE macros do a blind write to the phy
auxiliary control register and overwrite the EXT_PKT_LEN (bit 14) resulting
in intermittent crc errors on jumbo frames with some link partners. Change
the code to do a read/modify/write.
Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
[ Upstream commit daf3ec688e057f6060fb9bb0819feac7a8bbf45c ]
TG3_PHY_AUXCTL_SMDSP_ENABLE/DISABLE macros do a blind write to the phy
auxiliary control register and overwrite the EXT_PKT_LEN (bit 14) resulting
in intermittent crc errors on jumbo frames with some link partners. Change
the code to do a read/modify/write.
Signed-off-by: Nithin Nayak Sujir <nsujir@broadcom.com>
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
| drivers/net/ethernet/broadcom/tg3.c | diffblobblamehistory |