ath9k_hw: initialize more timing related registers for half/quarter channels
commitb6ba41bb27eb9810d54e2301355ce56fd0e94a1a
authorFelix Fietkau <nbd@openwrt.org>
Sat, 9 Jul 2011 04:12:50 +0000 (9 11:12 +0700)
committerJohn W. Linville <linville@tuxdriver.com>
Mon, 11 Jul 2011 19:02:13 +0000 (11 15:02 -0400)
treea1aac7e0e6ecc804247bd676810dd04340a5edc7
parent087b6ff682ff62c49c9a36ddfd24fc781367b1d1
ath9k_hw: initialize more timing related registers for half/quarter channels

Initialize the the clock-to-TSF field of AR_USEC and the SIFS and EIFS time
registers based on the clock rate instead of relying on initvals.
With those changes, some of the hardcoded AR9287 1.3+ specific overrides
can be dropped.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
drivers/net/wireless/ath/ath9k/hw.c