| commit | c49836f05aa15282f7280e06ede3f6f8a6324833 | |
| author | Miquel Raynal <miquel.raynal@bootlin.com> | |
| Mon, 8 Apr 2019 07:41:46 +0000 (8 09:41 +0200) | ||
| committer | Miquel Raynal <miquel.raynal@bootlin.com> | |
| Thu, 18 Apr 2019 06:54:05 +0000 (18 08:54 +0200) | ||
| tree | 323de15812efcb3679cbdee43a028af7ddea0ae5 | treesnapshot (tar.gz zip) |
| parent | a760e77d7598986256305e4770609bbfa9a42520 | commitdiff |
mtd: rawnand: sunxi: Add A23/A33 DMA support
Allwinner NAND controllers can make use of DMA to enhance the I/O
throughput thanks to ECC pipelining. DMA handling with A23/A33 NAND IP
is a bit different than with the older SoCs, hence the introduction of
a new compatible to handle:
* the differences between register offsets,
* the burst length change from 4 to minimum 8,
* drive SRAM accesses through the AHB bus instead of the MBUS.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Allwinner NAND controllers can make use of DMA to enhance the I/O
throughput thanks to ECC pipelining. DMA handling with A23/A33 NAND IP
is a bit different than with the older SoCs, hence the introduction of
a new compatible to handle:
* the differences between register offsets,
* the burst length change from 4 to minimum 8,
* drive SRAM accesses through the AHB bus instead of the MBUS.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
| drivers/mtd/nand/raw/sunxi_nand.c | diffblobblamehistory |