1 //===- HexagonMCChecker.h - Instruction bundle checking ---------*- C++ -*-===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 // This implements the checking of insns inside a bundle according to the
10 // packet constraint rules of the Hexagon ISA.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
17 #include "MCTargetDesc/HexagonMCInstrInfo.h"
18 #include "MCTargetDesc/HexagonMCTargetDesc.h"
19 #include "llvm/ADT/DenseMap.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/Support/SMLoc.h"
31 class MCSubtargetInfo
;
33 /// Check for a valid bundle.
34 class HexagonMCChecker
{
37 const MCRegisterInfo
&RI
;
38 MCInstrInfo
const &MCII
;
39 MCSubtargetInfo
const &STI
;
42 /// Set of definitions: register #, if predicated, if predicated true.
43 using PredSense
= std::pair
<unsigned, bool>;
44 static const PredSense Unconditional
;
45 using PredSet
= std::multiset
<PredSense
>;
46 using PredSetIterator
= std::multiset
<PredSense
>::iterator
;
48 using DefsIterator
= DenseMap
<unsigned, PredSet
>::iterator
;
49 DenseMap
<unsigned, PredSet
> Defs
;
51 /// Set of weak definitions whose clashes should be enforced selectively.
52 using SoftDefsIterator
= std::set
<unsigned>::iterator
;
53 std::set
<unsigned> SoftDefs
;
55 /// Set of temporary definitions not committed to the register file.
56 using TmpDefsIterator
= std::set
<unsigned>::iterator
;
57 std::set
<unsigned> TmpDefs
;
59 /// Set of new predicates used.
60 using NewPredsIterator
= std::set
<unsigned>::iterator
;
61 std::set
<unsigned> NewPreds
;
63 /// Set of predicates defined late.
64 using LatePredsIterator
= std::multiset
<unsigned>::iterator
;
65 std::multiset
<unsigned> LatePreds
;
68 using UsesIterator
= std::set
<unsigned>::iterator
;
69 std::set
<unsigned> Uses
;
71 /// Pre-defined set of read-only registers.
72 using ReadOnlyIterator
= std::set
<unsigned>::iterator
;
73 std::set
<unsigned> ReadOnly
;
76 void init(MCInst
const &);
77 void initReg(MCInst
const &, unsigned, unsigned &PredReg
, bool &isTrue
);
79 bool registerUsed(unsigned Register
);
80 std::tuple
<MCInst
const *, unsigned, HexagonMCInstrInfo::PredicateInfo
>
81 registerProducer(unsigned Register
,
82 HexagonMCInstrInfo::PredicateInfo Predicated
);
86 bool checkPredicates();
87 bool checkNewValues();
88 bool checkRegisters();
89 bool checkRegistersReadOnly();
90 void checkRegisterCurDefs();
98 static void compoundRegisterMap(unsigned &);
100 bool isPredicateRegister(unsigned R
) const {
101 return (Hexagon::P0
== R
|| Hexagon::P1
== R
|| Hexagon::P2
== R
||
105 bool isLoopRegister(unsigned R
) const {
106 return (Hexagon::SA0
== R
|| Hexagon::LC0
== R
|| Hexagon::SA1
== R
||
111 explicit HexagonMCChecker(MCContext
&Context
, MCInstrInfo
const &MCII
,
112 MCSubtargetInfo
const &STI
, MCInst
&mcb
,
113 const MCRegisterInfo
&ri
, bool ReportErrors
= true);
114 explicit HexagonMCChecker(HexagonMCChecker
const &Check
,
115 MCSubtargetInfo
const &STI
, bool CopyReportErrors
);
117 bool check(bool FullCheck
= true);
118 void reportErrorRegisters(unsigned Register
);
119 void reportErrorNewValue(unsigned Register
);
120 void reportError(SMLoc Loc
, Twine
const &Msg
);
121 void reportNote(SMLoc Loc
, Twine
const &Msg
);
122 void reportError(Twine
const &Msg
);
123 void reportWarning(Twine
const &Msg
);
124 void reportBranchErrors();
127 } // end namespace llvm
129 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H