[Codegen] Alter the default promotion for saturating adds and subs
[llvm-complete.git] / lib / Target / PowerPC / PPCBranchSelector.cpp
blobcdff4d383d236e4192bdd18617a7445104de16f9
1 //===-- PPCBranchSelector.cpp - Emit long conditional branches ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains a pass that scans a machine function to determine which
10 // conditional branches need more than 16 bits of displacement to reach their
11 // target basic block. It does this in two passes; a calculation of basic block
12 // positions pass, and a branch pseudo op to machine branch opcode pass. This
13 // pass should be run last, just before the assembly printer.
15 //===----------------------------------------------------------------------===//
17 #include "MCTargetDesc/PPCPredicates.h"
18 #include "PPC.h"
19 #include "PPCInstrBuilder.h"
20 #include "PPCInstrInfo.h"
21 #include "PPCSubtarget.h"
22 #include "llvm/ADT/Statistic.h"
23 #include "llvm/CodeGen/MachineFunctionPass.h"
24 #include "llvm/CodeGen/MachineRegisterInfo.h"
25 #include "llvm/CodeGen/TargetSubtargetInfo.h"
26 #include "llvm/Support/MathExtras.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include <algorithm>
29 using namespace llvm;
31 #define DEBUG_TYPE "ppc-branch-select"
33 STATISTIC(NumExpanded, "Number of branches expanded to long format");
35 namespace {
36 struct PPCBSel : public MachineFunctionPass {
37 static char ID;
38 PPCBSel() : MachineFunctionPass(ID) {
39 initializePPCBSelPass(*PassRegistry::getPassRegistry());
42 // The sizes of the basic blocks in the function (the first
43 // element of the pair); the second element of the pair is the amount of the
44 // size that is due to potential padding.
45 std::vector<std::pair<unsigned, unsigned>> BlockSizes;
47 // The first block number which has imprecise instruction address.
48 int FirstImpreciseBlock = -1;
50 unsigned GetAlignmentAdjustment(MachineBasicBlock &MBB, unsigned Offset);
51 unsigned ComputeBlockSizes(MachineFunction &Fn);
52 void modifyAdjustment(MachineFunction &Fn);
53 int computeBranchSize(MachineFunction &Fn,
54 const MachineBasicBlock *Src,
55 const MachineBasicBlock *Dest,
56 unsigned BrOffset);
58 bool runOnMachineFunction(MachineFunction &Fn) override;
60 MachineFunctionProperties getRequiredProperties() const override {
61 return MachineFunctionProperties().set(
62 MachineFunctionProperties::Property::NoVRegs);
65 StringRef getPassName() const override { return "PowerPC Branch Selector"; }
67 char PPCBSel::ID = 0;
70 INITIALIZE_PASS(PPCBSel, "ppc-branch-select", "PowerPC Branch Selector",
71 false, false)
73 /// createPPCBranchSelectionPass - returns an instance of the Branch Selection
74 /// Pass
75 ///
76 FunctionPass *llvm::createPPCBranchSelectionPass() {
77 return new PPCBSel();
80 /// In order to make MBB aligned, we need to add an adjustment value to the
81 /// original Offset.
82 unsigned PPCBSel::GetAlignmentAdjustment(MachineBasicBlock &MBB,
83 unsigned Offset) {
84 const Align Alignment = MBB.getAlignment();
85 if (Alignment == Align::None())
86 return 0;
88 const Align ParentAlign = MBB.getParent()->getAlignment();
90 if (Alignment <= ParentAlign)
91 return offsetToAlignment(Offset, Alignment);
93 // The alignment of this MBB is larger than the function's alignment, so we
94 // can't tell whether or not it will insert nops. Assume that it will.
95 if (FirstImpreciseBlock < 0)
96 FirstImpreciseBlock = MBB.getNumber();
97 return Alignment.value() + offsetToAlignment(Offset, Alignment);
100 /// We need to be careful about the offset of the first block in the function
101 /// because it might not have the function's alignment. This happens because,
102 /// under the ELFv2 ABI, for functions which require a TOC pointer, we add a
103 /// two-instruction sequence to the start of the function.
104 /// Note: This needs to be synchronized with the check in
105 /// PPCLinuxAsmPrinter::EmitFunctionBodyStart.
106 static inline unsigned GetInitialOffset(MachineFunction &Fn) {
107 unsigned InitialOffset = 0;
108 if (Fn.getSubtarget<PPCSubtarget>().isELFv2ABI() &&
109 !Fn.getRegInfo().use_empty(PPC::X2))
110 InitialOffset = 8;
111 return InitialOffset;
114 /// Measure each MBB and compute a size for the entire function.
115 unsigned PPCBSel::ComputeBlockSizes(MachineFunction &Fn) {
116 const PPCInstrInfo *TII =
117 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
118 unsigned FuncSize = GetInitialOffset(Fn);
120 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
121 ++MFI) {
122 MachineBasicBlock *MBB = &*MFI;
124 // The end of the previous block may have extra nops if this block has an
125 // alignment requirement.
126 if (MBB->getNumber() > 0) {
127 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, FuncSize);
129 auto &BS = BlockSizes[MBB->getNumber()-1];
130 BS.first += AlignExtra;
131 BS.second = AlignExtra;
133 FuncSize += AlignExtra;
136 unsigned BlockSize = 0;
137 for (MachineInstr &MI : *MBB) {
138 BlockSize += TII->getInstSizeInBytes(MI);
139 if (MI.isInlineAsm() && (FirstImpreciseBlock < 0))
140 FirstImpreciseBlock = MBB->getNumber();
143 BlockSizes[MBB->getNumber()].first = BlockSize;
144 FuncSize += BlockSize;
147 return FuncSize;
150 /// Modify the basic block align adjustment.
151 void PPCBSel::modifyAdjustment(MachineFunction &Fn) {
152 unsigned Offset = GetInitialOffset(Fn);
153 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
154 ++MFI) {
155 MachineBasicBlock *MBB = &*MFI;
157 if (MBB->getNumber() > 0) {
158 auto &BS = BlockSizes[MBB->getNumber()-1];
159 BS.first -= BS.second;
160 Offset -= BS.second;
162 unsigned AlignExtra = GetAlignmentAdjustment(*MBB, Offset);
164 BS.first += AlignExtra;
165 BS.second = AlignExtra;
167 Offset += AlignExtra;
170 Offset += BlockSizes[MBB->getNumber()].first;
174 /// Determine the offset from the branch in Src block to the Dest block.
175 /// BrOffset is the offset of the branch instruction inside Src block.
176 int PPCBSel::computeBranchSize(MachineFunction &Fn,
177 const MachineBasicBlock *Src,
178 const MachineBasicBlock *Dest,
179 unsigned BrOffset) {
180 int BranchSize;
181 Align MaxAlign = Align(4);
182 bool NeedExtraAdjustment = false;
183 if (Dest->getNumber() <= Src->getNumber()) {
184 // If this is a backwards branch, the delta is the offset from the
185 // start of this block to this branch, plus the sizes of all blocks
186 // from this block to the dest.
187 BranchSize = BrOffset;
188 MaxAlign = std::max(MaxAlign, Src->getAlignment());
190 int DestBlock = Dest->getNumber();
191 BranchSize += BlockSizes[DestBlock].first;
192 for (unsigned i = DestBlock+1, e = Src->getNumber(); i < e; ++i) {
193 BranchSize += BlockSizes[i].first;
194 MaxAlign = std::max(MaxAlign, Fn.getBlockNumbered(i)->getAlignment());
197 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
198 (DestBlock >= FirstImpreciseBlock);
199 } else {
200 // Otherwise, add the size of the blocks between this block and the
201 // dest to the number of bytes left in this block.
202 unsigned StartBlock = Src->getNumber();
203 BranchSize = BlockSizes[StartBlock].first - BrOffset;
205 MaxAlign = std::max(MaxAlign, Dest->getAlignment());
206 for (unsigned i = StartBlock+1, e = Dest->getNumber(); i != e; ++i) {
207 BranchSize += BlockSizes[i].first;
208 MaxAlign = std::max(MaxAlign, Fn.getBlockNumbered(i)->getAlignment());
211 NeedExtraAdjustment = (FirstImpreciseBlock >= 0) &&
212 (Src->getNumber() >= FirstImpreciseBlock);
215 // We tend to over estimate code size due to large alignment and
216 // inline assembly. Usually it causes larger computed branch offset.
217 // But sometimes it may also causes smaller computed branch offset
218 // than actual branch offset. If the offset is close to the limit of
219 // encoding, it may cause problem at run time.
220 // Following is a simplified example.
222 // actual estimated
223 // address address
224 // ...
225 // bne Far 100 10c
226 // .p2align 4
227 // Near: 110 110
228 // ...
229 // Far: 8108 8108
231 // Actual offset: 0x8108 - 0x100 = 0x8008
232 // Computed offset: 0x8108 - 0x10c = 0x7ffc
234 // This example also shows when we can get the largest gap between
235 // estimated offset and actual offset. If there is an aligned block
236 // ABB between branch and target, assume its alignment is <align>
237 // bits. Now consider the accumulated function size FSIZE till the end
238 // of previous block PBB. If the estimated FSIZE is multiple of
239 // 2^<align>, we don't need any padding for the estimated address of
240 // ABB. If actual FSIZE at the end of PBB is 4 bytes more than
241 // multiple of 2^<align>, then we need (2^<align> - 4) bytes of
242 // padding. It also means the actual branch offset is (2^<align> - 4)
243 // larger than computed offset. Other actual FSIZE needs less padding
244 // bytes, so causes smaller gap between actual and computed offset.
246 // On the other hand, if the inline asm or large alignment occurs
247 // between the branch block and destination block, the estimated address
248 // can be <delta> larger than actual address. If padding bytes are
249 // needed for a later aligned block, the actual number of padding bytes
250 // is at most <delta> more than estimated padding bytes. So the actual
251 // aligned block address is less than or equal to the estimated aligned
252 // block address. So the actual branch offset is less than or equal to
253 // computed branch offset.
255 // The computed offset is at most ((1 << alignment) - 4) bytes smaller
256 // than actual offset. So we add this number to the offset for safety.
257 if (NeedExtraAdjustment)
258 BranchSize += MaxAlign.value() - 4;
260 return BranchSize;
263 bool PPCBSel::runOnMachineFunction(MachineFunction &Fn) {
264 const PPCInstrInfo *TII =
265 static_cast<const PPCInstrInfo *>(Fn.getSubtarget().getInstrInfo());
266 // Give the blocks of the function a dense, in-order, numbering.
267 Fn.RenumberBlocks();
268 BlockSizes.resize(Fn.getNumBlockIDs());
269 FirstImpreciseBlock = -1;
271 // Measure each MBB and compute a size for the entire function.
272 unsigned FuncSize = ComputeBlockSizes(Fn);
274 // If the entire function is smaller than the displacement of a branch field,
275 // we know we don't need to shrink any branches in this function. This is a
276 // common case.
277 if (FuncSize < (1 << 15)) {
278 BlockSizes.clear();
279 return false;
282 // For each conditional branch, if the offset to its destination is larger
283 // than the offset field allows, transform it into a long branch sequence
284 // like this:
285 // short branch:
286 // bCC MBB
287 // long branch:
288 // b!CC $PC+8
289 // b MBB
291 bool MadeChange = true;
292 bool EverMadeChange = false;
293 while (MadeChange) {
294 // Iteratively expand branches until we reach a fixed point.
295 MadeChange = false;
297 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E;
298 ++MFI) {
299 MachineBasicBlock &MBB = *MFI;
300 unsigned MBBStartOffset = 0;
301 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
302 I != E; ++I) {
303 MachineBasicBlock *Dest = nullptr;
304 if (I->getOpcode() == PPC::BCC && !I->getOperand(2).isImm())
305 Dest = I->getOperand(2).getMBB();
306 else if ((I->getOpcode() == PPC::BC || I->getOpcode() == PPC::BCn) &&
307 !I->getOperand(1).isImm())
308 Dest = I->getOperand(1).getMBB();
309 else if ((I->getOpcode() == PPC::BDNZ8 || I->getOpcode() == PPC::BDNZ ||
310 I->getOpcode() == PPC::BDZ8 || I->getOpcode() == PPC::BDZ) &&
311 !I->getOperand(0).isImm())
312 Dest = I->getOperand(0).getMBB();
314 if (!Dest) {
315 MBBStartOffset += TII->getInstSizeInBytes(*I);
316 continue;
319 // Determine the offset from the current branch to the destination
320 // block.
321 int BranchSize = computeBranchSize(Fn, &MBB, Dest, MBBStartOffset);
323 // If this branch is in range, ignore it.
324 if (isInt<16>(BranchSize)) {
325 MBBStartOffset += 4;
326 continue;
329 // Otherwise, we have to expand it to a long branch.
330 MachineInstr &OldBranch = *I;
331 DebugLoc dl = OldBranch.getDebugLoc();
333 if (I->getOpcode() == PPC::BCC) {
334 // The BCC operands are:
335 // 0. PPC branch predicate
336 // 1. CR register
337 // 2. Target MBB
338 PPC::Predicate Pred = (PPC::Predicate)I->getOperand(0).getImm();
339 Register CRReg = I->getOperand(1).getReg();
341 // Jump over the uncond branch inst (i.e. $PC+8) on opposite condition.
342 BuildMI(MBB, I, dl, TII->get(PPC::BCC))
343 .addImm(PPC::InvertPredicate(Pred)).addReg(CRReg).addImm(2);
344 } else if (I->getOpcode() == PPC::BC) {
345 Register CRBit = I->getOperand(0).getReg();
346 BuildMI(MBB, I, dl, TII->get(PPC::BCn)).addReg(CRBit).addImm(2);
347 } else if (I->getOpcode() == PPC::BCn) {
348 Register CRBit = I->getOperand(0).getReg();
349 BuildMI(MBB, I, dl, TII->get(PPC::BC)).addReg(CRBit).addImm(2);
350 } else if (I->getOpcode() == PPC::BDNZ) {
351 BuildMI(MBB, I, dl, TII->get(PPC::BDZ)).addImm(2);
352 } else if (I->getOpcode() == PPC::BDNZ8) {
353 BuildMI(MBB, I, dl, TII->get(PPC::BDZ8)).addImm(2);
354 } else if (I->getOpcode() == PPC::BDZ) {
355 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ)).addImm(2);
356 } else if (I->getOpcode() == PPC::BDZ8) {
357 BuildMI(MBB, I, dl, TII->get(PPC::BDNZ8)).addImm(2);
358 } else {
359 llvm_unreachable("Unhandled branch type!");
362 // Uncond branch to the real destination.
363 I = BuildMI(MBB, I, dl, TII->get(PPC::B)).addMBB(Dest);
365 // Remove the old branch from the function.
366 OldBranch.eraseFromParent();
368 // Remember that this instruction is 8-bytes, increase the size of the
369 // block by 4, remember to iterate.
370 BlockSizes[MBB.getNumber()].first += 4;
371 MBBStartOffset += 8;
372 ++NumExpanded;
373 MadeChange = true;
377 if (MadeChange) {
378 // If we're going to iterate again, make sure we've updated our
379 // padding-based contributions to the block sizes.
380 modifyAdjustment(Fn);
383 EverMadeChange |= MadeChange;
386 BlockSizes.clear();
387 return true;