1 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
2 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
3 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
4 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
5 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
6 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
8 @glob = common local_unnamed_addr global i64 0, align 8
10 ; Function Attrs: norecurse nounwind readnone
11 define signext i32 @test_igtsll(i64 %a, i64 %b) {
12 ; CHECK-LABEL: test_igtsll:
13 ; CHECK: # %bb.0: # %entry
14 ; CHECK-NEXT: sradi [[REG1:r[0-9]+]], r4, 63
15 ; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], r3, 1, 63
16 ; CHECK-NEXT: subfc [[REG3:r[0-9]+]], r3, r4
17 ; CHECK-NEXT: adde [[REG4:r[0-9]+]], [[REG2]], [[REG1]]
18 ; CHECK-NEXT: xori r3, [[REG4]], 1
21 %cmp = icmp sgt i64 %a, %b
22 %conv = zext i1 %cmp to i32
26 ; Function Attrs: norecurse nounwind readnone
27 define signext i32 @test_igtsll_sext(i64 %a, i64 %b) {
28 ; CHECK-LABEL: test_igtsll_sext:
29 ; CHECK: # %bb.0: # %entry
30 ; CHECK-NEXT: sradi [[REG1:r[0-9]+]], r4, 63
31 ; CHECK-NEXT: rldicl [[REG2:r[0-9]+]], r3, 1, 63
32 ; CHECK-NEXT: subfc [[REG3:r[0-9]+]], r3, r4
33 ; CHECK-NEXT: adde [[REG4:r[0-9]+]], [[REG2]], [[REG1]]
34 ; CHECK-NEXT: xori [[REG5:r[0-9]+]], [[REG4]], 1
35 ; CHECK-NEXT: neg r3, [[REG5]]
38 %cmp = icmp sgt i64 %a, %b
39 %sub = sext i1 %cmp to i32
44 ; Function Attrs: norecurse nounwind readnone
45 define signext i32 @test_igtsll_z(i64 %a) {
46 ; CHECK-LABEL: test_igtsll_z:
47 ; CHECK: # %bb.0: # %entry
48 ; CHECK-NEXT: addi r4, r3, -1
49 ; CHECK-NEXT: nor r3, r4, r3
50 ; CHECK-NEXT: rldicl r3, r3, 1, 63
53 %cmp = icmp sgt i64 %a, 0
54 %conv = zext i1 %cmp to i32
58 ; Function Attrs: norecurse nounwind readnone
59 define signext i32 @test_igtsll_sext_z(i64 %a) {
60 ; CHECK-LABEL: test_igtsll_sext_z:
61 ; CHECK: addi [[REG1:r[0-9]+]], r3, -1
62 ; CHECK-NEXT: nor [[REG2:r[0-9]+]], [[REG1]], r3
63 ; CHECK-NEXT: sradi r3, [[REG2]], 63
65 %cmp = icmp sgt i64 %a, 0
66 %sub = sext i1 %cmp to i32
70 ; Function Attrs: norecurse nounwind
71 define void @test_igtsll_store(i64 %a, i64 %b) {
72 ; CHECK-LABEL: test_igtsll_store:
73 ; CHECK: # %bb.0: # %entry
74 ; CHECK: sradi [[REG1:r[0-9]+]], r4, 63
75 ; CHECK: rldicl [[REG2:r[0-9]+]], r3, 1, 63
76 ; CHECK-DIAG: subfc [[REG3:r[0-9]+]], r3, r4
77 ; CHECK: adde [[REG4:r[0-9]+]], [[REG2]], [[REG1]]
78 ; CHECK: xori [[REG5:r[0-9]+]], [[REG4]], 1
81 %cmp = icmp sgt i64 %a, %b
82 %conv1 = zext i1 %cmp to i64
83 store i64 %conv1, i64* @glob, align 8
87 ; Function Attrs: norecurse nounwind
88 define void @test_igtsll_sext_store(i64 %a, i64 %b) {
89 ; CHECK-LABEL: test_igtsll_sext_store:
90 ; CHECK: # %bb.0: # %entry
91 ; CHECK: sradi [[REG1:r[0-9]+]], r4, 63
92 ; CHECK: rldicl [[REG2:r[0-9]+]], r3, 1, 63
93 ; CHECK-DIAG: subfc [[REG3:r[0-9]+]], r3, r4
94 ; CHECK: adde [[REG4:r[0-9]+]], [[REG2]], [[REG1]]
95 ; CHECK: xori [[REG5:r[0-9]+]], [[REG4]], 1
96 ; CHECK: neg {{r[0-9]+}}, [[REG5]]
98 %cmp = icmp sgt i64 %a, %b
99 %conv1 = sext i1 %cmp to i64
100 store i64 %conv1, i64* @glob, align 8
105 ; Function Attrs: norecurse nounwind
106 define void @test_igtsll_z_store(i64 %a) {
107 ; CHECK-LABEL: test_igtsll_z_store:
108 ; CHECK: # %bb.0: # %entry
109 ; CHECK-NEXT: addis r4, r2, .LC0@toc@ha
110 ; CHECK-NEXT: addi r5, r3, -1
111 ; CHECK-NEXT: ld r4, .LC0@toc@l(r4)
112 ; CHECK-NEXT: nor r3, r5, r3
113 ; CHECK-NEXT: rldicl r3, r3, 1, 63
114 ; CHECK-NEXT: std r3, 0(r4)
117 %cmp = icmp sgt i64 %a, 0
118 %conv1 = zext i1 %cmp to i64
119 store i64 %conv1, i64* @glob, align 8
123 ; Function Attrs: norecurse nounwind
124 define void @test_igtsll_sext_z_store(i64 %a) {
125 ; CHECK-LABEL: test_igtsll_sext_z_store:
126 ; CHECK: addi [[REG1:r[0-9]+]], r3, -1
127 ; CHECK: nor [[REG2:r[0-9]+]], [[REG1]], r3
128 ; CHECK: sradi [[REG3:r[0-9]+]], [[REG2]], 63
130 %cmp = icmp sgt i64 %a, 0
131 %conv1 = sext i1 %cmp to i64
132 store i64 %conv1, i64* @glob, align 8