test/CodeGen/SystemZ/Large/branch-range-09.py

   1 # Test 32-bit COMPARE LOGICAL AND BRANCH in cases where the sheer number of
   2 # instructions causes some branches to be out of range.
   3 # RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
   4
   5 # Construct:
   6 #
   7 # before0:
   8 #   conditional branch to after0
   9 #   ...
  10 # beforeN:
  11 #   conditional branch to after0
  12 # main:
  13 #   0xffcc bytes, from MVIY instructions
  14 #   conditional branch to main
  15 # after0:
  16 #   ...
  17 #   conditional branch to main
  18 # afterN:
  19 #
  20 # Each conditional branch sequence occupies 12 bytes if it uses a short
  21 # branch and 14 if it uses a long one.  The ones before "main:" have to
  22 # take the branch length into account, which is 6 for short branches,
  23 # so the final (0x34 - 6) / 12 == 3 blocks can use short branches.
  24 # The ones after "main:" do not, so the first 0x34 / 12 == 4 blocks
  25 # can use short branches.
  26 #
  27 # CHECK: lb [[REG:%r[0-5]]], 0(%r3)
  28 # CHECK: clr %r4, [[REG]]
  29 # CHECK: jgl [[LABEL:\.L[^ ]*]]
  30 # CHECK: lb [[REG:%r[0-5]]], 1(%r3)
  31 # CHECK: clr %r4, [[REG]]
  32 # CHECK: jgl [[LABEL]]
  33 # CHECK: lb [[REG:%r[0-5]]], 2(%r3)
  34 # CHECK: clr %r4, [[REG]]
  35 # CHECK: jgl [[LABEL]]
  36 # CHECK: lb [[REG:%r[0-5]]], 3(%r3)
  37 # CHECK: clr %r4, [[REG]]
  38 # CHECK: jgl [[LABEL]]
  39 # CHECK: lb [[REG:%r[0-5]]], 4(%r3)
  40 # CHECK: clr %r4, [[REG]]
  41 # CHECK: jgl [[LABEL]]
  42 # CHECK: lb [[REG:%r[0-5]]], 5(%r3)
  43 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  44 # CHECK: lb [[REG:%r[0-5]]], 6(%r3)
  45 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  46 # CHECK: lb [[REG:%r[0-5]]], 7(%r3)
  47 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  48 # ...main goes here...
  49 # CHECK: lb [[REG:%r[0-5]]], 25(%r3)
  50 # CHECK: clrjl %r4, [[REG]], [[LABEL:\.L[^ ]*]]
  51 # CHECK: lb [[REG:%r[0-5]]], 26(%r3)
  52 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  53 # CHECK: lb [[REG:%r[0-5]]], 27(%r3)
  54 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  55 # CHECK: lb [[REG:%r[0-5]]], 28(%r3)
  56 # CHECK: clrjl %r4, [[REG]], [[LABEL]]
  57 # CHECK: lb [[REG:%r[0-5]]], 29(%r3)
  58 # CHECK: clr %r4, [[REG]]
  59 # CHECK: jgl [[LABEL]]
  60 # CHECK: lb [[REG:%r[0-5]]], 30(%r3)
  61 # CHECK: clr %r4, [[REG]]
  62 # CHECK: jgl [[LABEL]]
  63 # CHECK: lb [[REG:%r[0-5]]], 31(%r3)
  64 # CHECK: clr %r4, [[REG]]
  65 # CHECK: jgl [[LABEL]]
  66 # CHECK: lb [[REG:%r[0-5]]], 32(%r3)
  67 # CHECK: clr %r4, [[REG]]
  68 # CHECK: jgl [[LABEL]]
  69
  70 from __future__ import print_function
  71
  72 branch_blocks = 8
  73 main_size = 0xffcc
  74
  75 print('@global = global i32 0')
  76
  77 print('define void @f1(i8 *%base, i8 *%stop, i32 %limit) {')
  78 print('entry:')
  79 print('  br label %before0')
  80 print('')
  81
  82 for i in range(branch_blocks):
  83     next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
  84     print('before%d:' % i)
  85     print('  %%bstop%d = getelementptr i8, i8 *%%stop, i64 %d' % (i, i))
  86     print('  %%bcur%d = load i8 , i8 *%%bstop%d' % (i, i))
  87     print('  %%bext%d = sext i8 %%bcur%d to i32' % (i, i))
  88     print('  %%btest%d = icmp ult i32 %%limit, %%bext%d' % (i, i))
  89     print('  br i1 %%btest%d, label %%after0, label %%%s' % (i, next))
  90     print('')
  91
  92 print('%s:' % next)
  93 a, b = 1, 1
  94 for i in range(0, main_size, 6):
  95     a, b = b, a + b
  96     offset = 4096 + b % 500000
  97     value = a % 256
  98     print('  %%ptr%d = getelementptr i8, i8 *%%base, i64 %d' % (i, offset))
  99     print('  store volatile i8 %d, i8 *%%ptr%d' % (value, i))
 100
 101 for i in range(branch_blocks):
 102     print('  %%astop%d = getelementptr i8, i8 *%%stop, i64 %d' % (i, i + 25))
 103     print('  %%acur%d = load i8 , i8 *%%astop%d' % (i, i))
 104     print('  %%aext%d = sext i8 %%acur%d to i32' % (i, i))
 105     print('  %%atest%d = icmp ult i32 %%limit, %%aext%d' % (i, i))
 106     print('  br i1 %%atest%d, label %%main, label %%after%d' % (i, i))
 107     print('')
 108     print('after%d:' % i)
 109
 110 print('  %dummy = load volatile i32, i32 *@global')
 111 print('  ret void')
 112 print('}')