[ARM] More MVE compare vector splat combines for ANDs
[llvm-complete.git] / test / CodeGen / SystemZ / Large / branch-range-12.py
blob0911953a47a3abf19b3a1eef46d2c21c2a86bb4f
1 # Test 64-bit COMPARE LOGICAL IMMEDIATE AND BRANCH in cases where the sheer
2 # number of instructions causes some branches to be out of range.
3 # RUN: python %s | llc -mtriple=s390x-linux-gnu | FileCheck %s
5 # Construct:
7 # before0:
8 # conditional branch to after0
9 # ...
10 # beforeN:
11 # conditional branch to after0
12 # main:
13 # 0xffb4 bytes, from MVIY instructions
14 # conditional branch to main
15 # after0:
16 # ...
17 # conditional branch to main
18 # afterN:
20 # Each conditional branch sequence occupies 18 bytes if it uses a short
21 # branch and 24 if it uses a long one. The ones before "main:" have to
22 # take the branch length into account, which is 6 for short branches,
23 # so the final (0x4c - 6) / 18 == 3 blocks can use short branches.
24 # The ones after "main:" do not, so the first 0x4c / 18 == 4 blocks
25 # can use short branches. The conservative algorithm we use makes
26 # one of the forward branches unnecessarily long, as noted in the
27 # check output below.
29 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
30 # CHECK: sg [[REG]], 0(%r4)
31 # CHECK: clgfi [[REG]], 50
32 # CHECK: jgl [[LABEL:\.L[^ ]*]]
33 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
34 # CHECK: sg [[REG]], 0(%r4)
35 # CHECK: clgfi [[REG]], 51
36 # CHECK: jgl [[LABEL]]
37 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
38 # CHECK: sg [[REG]], 0(%r4)
39 # CHECK: clgfi [[REG]], 52
40 # CHECK: jgl [[LABEL]]
41 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
42 # CHECK: sg [[REG]], 0(%r4)
43 # CHECK: clgfi [[REG]], 53
44 # CHECK: jgl [[LABEL]]
45 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
46 # CHECK: sg [[REG]], 0(%r4)
47 # CHECK: clgfi [[REG]], 54
48 # CHECK: jgl [[LABEL]]
49 # ...as mentioned above, the next one could be a CLGIJL instead...
50 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
51 # CHECK: sg [[REG]], 0(%r4)
52 # CHECK: clgfi [[REG]], 55
53 # CHECK: jgl [[LABEL]]
54 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
55 # CHECK: sg [[REG]], 0(%r4)
56 # CHECK: clgijl [[REG]], 56, [[LABEL]]
57 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
58 # CHECK: sg [[REG]], 0(%r4)
59 # CHECK: clgijl [[REG]], 57, [[LABEL]]
60 # ...main goes here...
61 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
62 # CHECK: sg [[REG]], 0(%r4)
63 # CHECK: clgijl [[REG]], 100, [[LABEL:\.L[^ ]*]]
64 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
65 # CHECK: sg [[REG]], 0(%r4)
66 # CHECK: clgijl [[REG]], 101, [[LABEL]]
67 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
68 # CHECK: sg [[REG]], 0(%r4)
69 # CHECK: clgijl [[REG]], 102, [[LABEL]]
70 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
71 # CHECK: sg [[REG]], 0(%r4)
72 # CHECK: clgijl [[REG]], 103, [[LABEL]]
73 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
74 # CHECK: sg [[REG]], 0(%r4)
75 # CHECK: clgfi [[REG]], 104
76 # CHECK: jgl [[LABEL]]
77 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
78 # CHECK: sg [[REG]], 0(%r4)
79 # CHECK: clgfi [[REG]], 105
80 # CHECK: jgl [[LABEL]]
81 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
82 # CHECK: sg [[REG]], 0(%r4)
83 # CHECK: clgfi [[REG]], 106
84 # CHECK: jgl [[LABEL]]
85 # CHECK: lg [[REG:%r[0-5]]], 0(%r3)
86 # CHECK: sg [[REG]], 0(%r4)
87 # CHECK: clgfi [[REG]], 107
88 # CHECK: jgl [[LABEL]]
90 from __future__ import print_function
92 branch_blocks = 8
93 main_size = 0xffb4
95 print('@global = global i32 0')
97 print('define void @f1(i8 *%base, i64 *%stopa, i64 *%stopb) {')
98 print('entry:')
99 print(' br label %before0')
100 print('')
102 for i in range(branch_blocks):
103 next = 'before%d' % (i + 1) if i + 1 < branch_blocks else 'main'
104 print('before%d:' % i)
105 print(' %%bcur%da = load i64 , i64 *%%stopa' % i)
106 print(' %%bcur%db = load i64 , i64 *%%stopb' % i)
107 print(' %%bsub%d = sub i64 %%bcur%da, %%bcur%db' % (i, i, i))
108 print(' %%btest%d = icmp ult i64 %%bsub%d, %d' % (i, i, i + 50))
109 print(' br i1 %%btest%d, label %%after0, label %%%s' % (i, next))
110 print('')
112 print('%s:' % next)
113 a, b = 1, 1
114 for i in range(0, main_size, 6):
115 a, b = b, a + b
116 offset = 4096 + b % 500000
117 value = a % 256
118 print(' %%ptr%d = getelementptr i8, i8 *%%base, i64 %d' % (i, offset))
119 print(' store volatile i8 %d, i8 *%%ptr%d' % (value, i))
121 for i in range(branch_blocks):
122 print(' %%acur%da = load i64 , i64 *%%stopa' % i)
123 print(' %%acur%db = load i64 , i64 *%%stopb' % i)
124 print(' %%asub%d = sub i64 %%acur%da, %%acur%db' % (i, i, i))
125 print(' %%atest%d = icmp ult i64 %%asub%d, %d' % (i, i, i + 100))
126 print(' br i1 %%atest%d, label %%main, label %%after%d' % (i, i))
127 print('')
128 print('after%d:' % i)
130 print(' %dummy = load volatile i32, i32 *@global')
131 print(' ret void')
132 print('}')