1 ; RUN: llc -mtriple armv7-apple-ios -relocation-model=pic -o - %s | FileCheck %s -check-prefix=ARM-PIC -check-prefix=ARM
2 ; RUN: llc -mtriple armv7-apple-ios -relocation-model=static -o - %s | FileCheck %s -check-prefix=ARM-NOPIC -check-prefix=ARM
3 ; RUN: llc -mtriple armv7-apple-ios -relocation-model=dynamic-no-pic -o - %s | FileCheck %s -check-prefix=ARM-NOPIC -check-prefix=ARM
4 ; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=pic -o - %s | FileCheck %s -check-prefix=THUMB1-PIC -check-prefix=THUMB1
5 ; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=static -o - %s | FileCheck %s -check-prefix=THUMB1-NOPIC -check-prefix=THUMB1
6 ; RUN: llc -mtriple thumbv6-apple-ios -relocation-model=dynamic-no-pic -o - %s | FileCheck %s -check-prefix=THUMB1-NOPIC -check-prefix=THUMB1
8 @_ZTIi = external constant i8*
10 define i32 @main() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) {
12 %exception = tail call i8* @__cxa_allocate_exception(i32 4) #1
13 %0 = bitcast i8* %exception to i32*
14 store i32 1, i32* %0, align 4
15 invoke void @__cxa_throw(i8* %exception, i8* bitcast (i8** @_ZTIi to i8*), i8* null) #2
16 to label %unreachable unwind label %lpad
18 lpad: ; preds = %entry
19 %1 = landingpad { i8*, i32 }
21 %2 = extractvalue { i8*, i32 } %1, 0
22 %3 = tail call i8* @__cxa_begin_catch(i8* %2) #1
23 tail call void @__cxa_end_catch()
26 unreachable: ; preds = %entry
30 declare i8* @__cxa_allocate_exception(i32)
32 declare void @__cxa_throw(i8*, i8*, i8*)
34 declare i8* @__cxa_begin_catch(i8*)
36 declare void @__cxa_end_catch()
38 declare i32 @__gxx_personality_sj0(...)
40 attributes #0 = { ssp }
41 attributes #1 = { nounwind }
42 attributes #2 = { noreturn }
49 ; ARM-PIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
50 ; ARM-PIC: ldr [[REG0:r[0-9]+]], [r{{[0-9]+}}, [[REG1]]]
51 ; ARM-PIC: add pc, [[REG0]], [[REG1]]
53 ; ARM-PIC: .data_region jt32
54 ; ARM-PIC: .long [[LABEL:LBB0_[0-9]]]-[[LJTI]]
55 ; ARM-PIC: .end_data_region
58 ; ARM-NOPIC: cxa_throw
60 ; ARM-NOPIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
61 ; ARM-NOPIC: ldr [[REG0:r[0-9]+]], [r{{[0-9]+}}, [[REG1]]]
62 ; ARM-NOPIC: mov pc, [[REG0]]
64 ; ARM-NOPIC: .data_region jt32
65 ; ARM-NOPIC: .long [[LABEL:LBB0_[0-9]]]
66 ; ARM-NOPIC: .end_data_region
67 ; ARM-NOPIC: [[LABEL]]
72 ; On Thumb1 targets, we have no way to preserve the floating-point registers.
73 ; If all other code is built for Thumb1 or is built soft-float, this is not a
74 ; problem as the FP regs don't need saving. However, if this code is linked
75 ; against ARM code that uses the FP regs, they won't be restored correctly. We
76 ; don't support this use-case, but have no way to prevent it in the compiler.
78 ; THUMB1: push {{[^d]*$}}
81 ; THUMB1-PIC: cxa_throw
83 ; THUMB1-PIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
84 ; THUMB1-PIC: adds [[REG0:r[0-9]+]], [[REG0]], [[REG1]]
85 ; THUMB1-PIC: ldr [[REG0]]
86 ; THUMB1-PIC: adds [[REG0]], [[REG0]], [[REG1]]
87 ; THUMB1-PIC: mov pc, [[REG0]]
88 ; THUMB1-PIC: [[LJTI]]
89 ; THUMB1-PIC: .data_region jt32
90 ; THUMB1-PIC: .long [[LABEL:LBB0_[0-9]]]-[[LJTI]]
91 ; THUMB1-PIC: .end_data_region
92 ; THUMB1-PIC: [[LABEL]]
94 ; THUMB1-NOPIC: cxa_throw
96 ; THUMB1-NOPIC: adr [[REG1:r[0-9]+]], [[LJTI:.*]]
97 ; THUMB1-NOPIC: adds [[REG0:r[0-9]+]], [[REG0]], [[REG1]]
98 ; THUMB1-NOPIC: ldr [[REG0]]
99 ; THUMB1-NOPIC: mov pc, [[REG0]]
100 ; THUMB1-NOPIC: [[LJTI]]
101 ; THUMB1-NOPIC: .data_region jt32
102 ; THUMB1-NOPIC: .long [[LABEL:LBB0_[0-9]]]+1
103 ; THUMB1-NOPIC: .end_data_region
104 ; THUMB1-NOPIC: [[LABEL]]
107 ; THUMB1: pop {{[^d]*$}}