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HEAD
[ARM] Cortex-M4 schedule additions
[llvm-complete.git]
/
test
/
CodeGen
/
Generic
/
pr24662.ll
blob
5a10b9cb0acb444f9d64f6d9bef1a29aca361468
1
; RUN: llc < %s -fast-isel
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; RUN: llc < %s
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define i60 @PR24662a() {
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ret i60 trunc (i670010 fptoui(float 0x400D9999A0000000 to i670010) to i60)
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}
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define i60 @PR24662b() {
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%1 = fptoui float 0x400D9999A0000000 to i670010
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%2 = trunc i670010 %1 to i60
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ret i60 %2
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}