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[ARM] Cortex-M4 schedule additions
[llvm-complete.git]
/
test
/
CodeGen
/
MIR
/
X86
/
empty2.mir
blob
1d8065fea6db393d2ee683a94c4f5e6565c86c2c
1
# RUN: llc -mtriple=x86_64-- -run-pass none -o - %s | FileCheck %s
2
# Make sure empty files don't crash us
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---
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...
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# CHECK: --- |
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# ... moduleid, sourcefilename stuff here ..
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# CHECK: target datalayout =
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# CHECK: ...