[InstCombine] Signed saturation patterns
[llvm-complete.git] / lib / Target / Hexagon / HexagonRegisterInfo.h
blobfc166b5a34109577e63679ff68f71c7b2d112ecd
1 //==- HexagonRegisterInfo.h - Hexagon Register Information Impl --*- C++ -*-==//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file contains the Hexagon implementation of the TargetRegisterInfo
10 // class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
15 #define LLVM_LIB_TARGET_HEXAGON_HEXAGONREGISTERINFO_H
17 #include "llvm/CodeGen/TargetRegisterInfo.h"
19 #define GET_REGINFO_HEADER
20 #include "HexagonGenRegisterInfo.inc"
22 namespace llvm {
24 namespace Hexagon {
25 // Generic (pseudo) subreg indices for use with getHexagonSubRegIndex.
26 enum { ps_sub_lo = 0, ps_sub_hi = 1 };
29 class HexagonRegisterInfo : public HexagonGenRegisterInfo {
30 public:
31 HexagonRegisterInfo(unsigned HwMode);
33 /// Code Generation virtual methods...
34 const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF)
35 const override;
36 const uint32_t *getCallPreservedMask(const MachineFunction &MF,
37 CallingConv::ID) const override;
39 BitVector getReservedRegs(const MachineFunction &MF) const override;
41 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
42 unsigned FIOperandNum, RegScavenger *RS = nullptr) const override;
44 /// Returns true since we may need scavenging for a temporary register
45 /// when generating hardware loop instructions.
46 bool requiresRegisterScavenging(const MachineFunction &MF) const override {
47 return true;
50 /// Returns true. Spill code for predicate registers might need an extra
51 /// register.
52 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override {
53 return true;
56 /// Returns true if the frame pointer is valid.
57 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
59 bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override {
60 return true;
63 bool shouldCoalesce(MachineInstr *MI, const TargetRegisterClass *SrcRC,
64 unsigned SubReg, const TargetRegisterClass *DstRC, unsigned DstSubReg,
65 const TargetRegisterClass *NewRC, LiveIntervals &LIS) const override;
67 // Debug information queries.
68 unsigned getRARegister() const;
69 Register getFrameRegister(const MachineFunction &MF) const override;
70 unsigned getFrameRegister() const;
71 unsigned getStackRegister() const;
73 unsigned getHexagonSubRegIndex(const TargetRegisterClass &RC,
74 unsigned GenIdx) const;
76 const MCPhysReg *getCallerSavedRegs(const MachineFunction *MF,
77 const TargetRegisterClass *RC) const;
79 unsigned getFirstCallerSavedNonParamReg() const;
81 const TargetRegisterClass *
82 getPointerRegClass(const MachineFunction &MF,
83 unsigned Kind = 0) const override;
85 bool isEHReturnCalleeSaveReg(unsigned Reg) const;
88 } // end namespace llvm
90 #endif