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[InstCombine] Signed saturation patterns
[llvm-complete.git]
/
test
/
CodeGen
/
MIR
/
AMDGPU
/
mfi-parse-error-scratch-wave-offset-reg.mir
blob
bbf58085cfa03efae0e661537c50f3f783c12257
1
# RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
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# CHECK: :7:27: expected a named register
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# CHECK: scratchWaveOffsetReg: ''
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---
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name: empty_scratch_wave_offset_reg
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machineFunctionInfo:
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scratchWaveOffsetReg: ''
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body: |
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bb.0:
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S_ENDPGM
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...