| blob | 6ef93d268b6be1acc8b83e0ebb1d0c16a522611a |
1 ; RUN: llc -verify-machineinstrs < %s | FileCheck %s
2 ; This test case used to fail both with and without -verify-machineinstrs
3 ; (-verify-machineinstrs would catch the problem right after instruction
4 ; scheduling because the live intervals would not be right for the registers
5 ; that were both inputs to the inline asm and also early-clobber outputs).
7 target datalayout = "E-m:e-i64:64-n32:64"
8 target triple = "powerpc64-bgq-linux"
10 %struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713 = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker.118.8248.32638.195238.200116.211498.218002.221254.222880.224506.226132.240766.244018.245644.248896.260278.271660.281416.283042.302554.304180.325318.326944.344712*, %struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
11 %struct._IO_marker.118.8248.32638.195238.200116.211498.218002.221254.222880.224506.226132.240766.244018.245644.248896.260278.271660.281416.283042.302554.304180.325318.326944.344712 = type { %struct._IO_marker.118.8248.32638.195238.200116.211498.218002.221254.222880.224506.226132.240766.244018.245644.248896.260278.271660.281416.283042.302554.304180.325318.326944.344712*, %struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i32 }
13 @.str236 = external unnamed_addr constant [121 x i8], align 1
14 @.str294 = external unnamed_addr constant [49 x i8], align 1
16 ; Function Attrs: nounwind
17 declare void @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* nocapture, i8* nocapture readonly, ...) #0
19 ; Function Attrs: inlinehint nounwind
20 define void @_ZN4PAMI6Device2MU15ResourceManager46calculatePerCoreMUResourcesBasedOnAvailabilityEv(i32 %inp32, i64 %inp64) #1 align 2 {
21 ; CHECK-LABEL: @_ZN4PAMI6Device2MU15ResourceManager46calculatePerCoreMUResourcesBasedOnAvailabilityEv
22 ; CHECK: sc
24 entry:
25 %numFreeResourcesInSubgroup = alloca i32, align 4
26 %0 = ptrtoint i32* %numFreeResourcesInSubgroup to i64
27 br label %for.cond2.preheader
29 for.cond2.preheader: ; preds = %if.end23.3, %entry
30 %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %if.end23.3 ]
31 %group.098 = phi i32 [ 0, %entry ], [ %inc37, %if.end23.3 ]
32 %minFreeBatIdsPerCore.097 = phi i64 [ 32, %entry ], [ %numFreeBatIdsInGroup.0.minFreeBatIdsPerCore.0, %if.end23.3 ]
33 %minFreeRecFifosPerCore.096 = phi i64 [ 16, %entry ], [ %minFreeRecFifosPerCore.1, %if.end23.3 ]
34 %minFreeInjFifosPerCore.095 = phi i64 [ 32, %entry ], [ %numFreeInjFifosInGroup.0.minFreeInjFifosPerCore.0, %if.end23.3 ]
35 %cmp5 = icmp eq i32 %inp32, 0
36 br i1 %cmp5, label %if.end, label %if.then
38 if.then: ; preds = %if.end23.2, %if.end23.1, %if.end23, %for.cond2.preheader
39 unreachable
41 if.end: ; preds = %for.cond2.preheader
42 %1 = load i32, i32* %numFreeResourcesInSubgroup, align 4
43 %conv = zext i32 %1 to i64
44 %2 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %indvars.iv, i64 %0, i64 %inp64) #2
45 %cmp10 = icmp eq i32 0, 0
46 br i1 %cmp10, label %if.end14, label %if.then11
48 if.then11: ; preds = %if.end.3, %if.end.2, %if.end.1, %if.end
49 unreachable
51 if.end14: ; preds = %if.end
52 %3 = load i32, i32* %numFreeResourcesInSubgroup, align 4
53 %cmp19 = icmp eq i32 %inp32, 0
54 br i1 %cmp19, label %if.end23, label %if.then20
56 if.then20: ; preds = %if.end14.3, %if.end14.2, %if.end14.1, %if.end14
57 %conv4.i65.lcssa = phi i32 [ %inp32, %if.end14 ], [ 0, %if.end14.1 ], [ %conv4.i65.2, %if.end14.2 ], [ %conv4.i65.3, %if.end14.3 ]
58 call void (%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i8*, ...) @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* undef, i8* getelementptr inbounds ([121 x i8], [121 x i8]* @.str236, i64 0, i64 0), i32 signext 2503) #3
59 call void (%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713*, i8*, ...) @fprintf(%struct._IO_FILE.119.8249.32639.195239.200117.211499.218003.221255.222881.224507.226133.240767.244019.245645.248897.260279.271661.281417.283043.302555.304181.325319.326945.344713* undef, i8* getelementptr inbounds ([49 x i8], [49 x i8]* @.str294, i64 0, i64 0), i32 signext %conv4.i65.lcssa) #3
60 unreachable
62 if.end23: ; preds = %if.end14
63 %conv15 = zext i32 %3 to i64
64 %4 = load i32, i32* %numFreeResourcesInSubgroup, align 4
65 %conv24 = zext i32 %4 to i64
66 %5 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1033, i64 0, i64 %0, i64 %inp64) #2
67 %cmp5.1 = icmp eq i32 0, 0
68 br i1 %cmp5.1, label %if.end.1, label %if.then
70 for.end38: ; preds = %if.end23.3
71 ret void
73 if.end.1: ; preds = %if.end23
74 %6 = load i32, i32* %numFreeResourcesInSubgroup, align 4
75 %conv.1 = zext i32 %6 to i64
76 %add.1 = add nuw nsw i64 %conv.1, %conv
77 %7 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 0, i64 %0, i64 %inp64) #2
78 %cmp10.1 = icmp eq i32 %inp32, 0
79 br i1 %cmp10.1, label %if.end14.1, label %if.then11
81 if.end14.1: ; preds = %if.end.1
82 %8 = load i32, i32* %numFreeResourcesInSubgroup, align 4
83 %cmp19.1 = icmp eq i32 0, 0
84 br i1 %cmp19.1, label %if.end23.1, label %if.then20
86 if.end23.1: ; preds = %if.end14.1
87 %conv15.1 = zext i32 %8 to i64
88 %add16.1 = add nuw nsw i64 %conv15.1, %conv15
89 %9 = load i32, i32* %numFreeResourcesInSubgroup, align 4
90 %conv24.1 = zext i32 %9 to i64
91 %add25.1 = add nuw nsw i64 %conv24.1, %conv24
92 %cmp5.2 = icmp eq i32 %inp32, 0
93 br i1 %cmp5.2, label %if.end.2, label %if.then
95 if.end.2: ; preds = %if.end23.1
96 %10 = load i32, i32* %numFreeResourcesInSubgroup, align 4
97 %conv.2 = zext i32 %10 to i64
98 %add.2 = add nuw nsw i64 %conv.2, %add.1
99 %11 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1034, i64 %inp64, i64 %0, i64 %inp64) #2
100 %cmp10.2 = icmp eq i32 0, 0
101 br i1 %cmp10.2, label %if.end14.2, label %if.then11
103 if.end14.2: ; preds = %if.end.2
104 %12 = load i32, i32* %numFreeResourcesInSubgroup, align 4
105 %13 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 %inp64, i64 %0, i64 0) #2
106 %asmresult1.i64.2 = extractvalue { i64, i64, i64, i64 } %13, 1
107 %conv4.i65.2 = trunc i64 %asmresult1.i64.2 to i32
108 %cmp19.2 = icmp eq i32 %conv4.i65.2, 0
109 br i1 %cmp19.2, label %if.end23.2, label %if.then20
111 if.end23.2: ; preds = %if.end14.2
112 %conv15.2 = zext i32 %12 to i64
113 %add16.2 = add nuw nsw i64 %conv15.2, %add16.1
114 %14 = load i32, i32* %numFreeResourcesInSubgroup, align 4
115 %conv24.2 = zext i32 %14 to i64
116 %add25.2 = add nuw nsw i64 %conv24.2, %add25.1
117 %cmp5.3 = icmp eq i32 0, 0
118 br i1 %cmp5.3, label %if.end.3, label %if.then
120 if.end.3: ; preds = %if.end23.2
121 %15 = load i32, i32* %numFreeResourcesInSubgroup, align 4
122 %conv.3 = zext i32 %15 to i64
123 %add.3 = add nuw nsw i64 %conv.3, %add.2
124 %cmp10.3 = icmp eq i32 %inp32, 0
125 br i1 %cmp10.3, label %if.end14.3, label %if.then11
127 if.end14.3: ; preds = %if.end.3
128 %16 = load i32, i32* %numFreeResourcesInSubgroup, align 4
129 %17 = call { i64, i64, i64, i64 } asm sideeffect "sc", "=&{r0},=&{r3},=&{r4},=&{r5},{r0},{r3},{r4},{r5},~{r6},~{r7},~{r8},~{r9},~{r10},~{r11},~{r12},~{cr0},~{memory}"(i64 1035, i64 0, i64 %0, i64 0) #2
130 %asmresult1.i64.3 = extractvalue { i64, i64, i64, i64 } %17, 1
131 %conv4.i65.3 = trunc i64 %asmresult1.i64.3 to i32
132 %cmp19.3 = icmp eq i32 %conv4.i65.3, 0
133 br i1 %cmp19.3, label %if.end23.3, label %if.then20
135 if.end23.3: ; preds = %if.end14.3
136 %conv15.3 = zext i32 %16 to i64
137 %add16.3 = add nuw nsw i64 %conv15.3, %add16.2
138 %add25.3 = add nuw nsw i64 0, %add25.2
139 %indvars.iv.next = add nuw nsw i64 %indvars.iv, 4
140 %cmp27 = icmp ult i64 %add.3, %minFreeInjFifosPerCore.095
141 %numFreeInjFifosInGroup.0.minFreeInjFifosPerCore.0 = select i1 %cmp27, i64 %add.3, i64 %minFreeInjFifosPerCore.095
142 %cmp30 = icmp ult i64 %add16.3, %minFreeRecFifosPerCore.096
143 %minFreeRecFifosPerCore.1 = select i1 %cmp30, i64 %add16.3, i64 %minFreeRecFifosPerCore.096
144 %cmp33 = icmp ult i64 %add25.3, %minFreeBatIdsPerCore.097
145 %numFreeBatIdsInGroup.0.minFreeBatIdsPerCore.0 = select i1 %cmp33, i64 %add25.3, i64 %minFreeBatIdsPerCore.097
146 %inc37 = add nuw nsw i32 %group.098, 1
147 %cmp = icmp ult i32 %inc37, 16
148 br i1 %cmp, label %for.cond2.preheader, label %for.end38
149 }
151 attributes #0 = { nounwind "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="a2q" }
152 attributes #1 = { inlinehint nounwind "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "target-cpu"="a2q" }
153 attributes #2 = { nounwind }
154 attributes #3 = { cold nounwind }