1 ; Test 64-bit addition in which the second operand is constant.
3 ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
8 define zeroext i1 @f1(i64 %dummy, i64 %a, i64 *%res) {
11 ; CHECK-DAG: stg %r3, 0(%r4)
12 ; CHECK-DAG: ipm [[REG:%r[0-5]]]
13 ; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
15 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
16 %val = extractvalue {i64, i1} %t, 0
17 %obit = extractvalue {i64, i1} %t, 1
18 store i64 %val, i64 *%res
22 ; Check the high end of the ALGFI range.
23 define zeroext i1 @f2(i64 %dummy, i64 %a, i64 *%res) {
25 ; CHECK: algfi %r3, 4294967295
26 ; CHECK-DAG: stg %r3, 0(%r4)
27 ; CHECK-DAG: ipm [[REG:%r[0-5]]]
28 ; CHECK-DAG: risbg %r2, [[REG]], 63, 191, 35
30 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967295)
31 %val = extractvalue {i64, i1} %t, 0
32 %obit = extractvalue {i64, i1} %t, 1
33 store i64 %val, i64 *%res
37 ; Check the next value up, which must be loaded into a register first.
38 define zeroext i1 @f3(i64 %dummy, i64 %a, i64 *%res) {
40 ; CHECK: llihl [[REG1:%r[0-9]+]], 1
41 ; CHECK: algr [[REG1]], %r3
42 ; CHECK-DAG: stg [[REG1]], 0(%r4)
43 ; CHECK-DAG: ipm [[REG2:%r[0-5]]]
44 ; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
46 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 4294967296)
47 %val = extractvalue {i64, i1} %t, 0
48 %obit = extractvalue {i64, i1} %t, 1
49 store i64 %val, i64 *%res
53 ; Likewise for negative values.
54 define zeroext i1 @f4(i64 %dummy, i64 %a, i64 *%res) {
56 ; CHECK: lghi [[REG1:%r[0-9]+]], -1
57 ; CHECK: algr [[REG1]], %r3
58 ; CHECK-DAG: stg [[REG1]], 0(%r4)
59 ; CHECK-DAG: ipm [[REG2:%r[0-5]]]
60 ; CHECK-DAG: risbg %r2, [[REG2]], 63, 191, 35
62 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 -1)
63 %val = extractvalue {i64, i1} %t, 0
64 %obit = extractvalue {i64, i1} %t, 1
65 store i64 %val, i64 *%res
69 ; Check using the overflow result for a branch.
70 define void @f5(i64 %dummy, i64 %a, i64 *%res) {
73 ; CHECK: stg %r3, 0(%r4)
74 ; CHECK: jgnle foo@PLT
76 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
77 %val = extractvalue {i64, i1} %t, 0
78 %obit = extractvalue {i64, i1} %t, 1
79 store i64 %val, i64 *%res
80 br i1 %obit, label %call, label %exit
90 ; ... and the same with the inverted direction.
91 define void @f6(i64 %dummy, i64 %a, i64 *%res) {
94 ; CHECK: stg %r3, 0(%r4)
97 %t = call {i64, i1} @llvm.uadd.with.overflow.i64(i64 %a, i64 1)
98 %val = extractvalue {i64, i1} %t, 0
99 %obit = extractvalue {i64, i1} %t, 1
100 store i64 %val, i64 *%res
101 br i1 %obit, label %exit, label %call
111 declare {i64, i1} @llvm.uadd.with.overflow.i64(i64, i64) nounwind readnone