1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck %s
4 ; Store a <4 x i31> vector.
5 define void @fun0(<4 x i31> %src, <4 x i31>* %p)
8 ; CHECK-NEXT: vlgvf %r1, %v24, 0
9 ; CHECK-NEXT: vlgvf %r0, %v24, 1
10 ; CHECK-NEXT: sllg %r1, %r1, 29
11 ; CHECK-NEXT: rosbg %r1, %r0, 35, 63, 62
12 ; CHECK-NEXT: nihh %r1, 4095
13 ; CHECK-NEXT: stg %r1, 0(%r2)
14 ; CHECK-NEXT: vlgvf %r1, %v24, 2
15 ; CHECK-NEXT: risbgn %r0, %r0, 0, 129, 62
16 ; CHECK-NEXT: rosbg %r0, %r1, 2, 32, 31
17 ; CHECK-NEXT: vlgvf %r1, %v24, 3
18 ; CHECK-NEXT: rosbg %r0, %r1, 33, 63, 0
19 ; CHECK-NEXT: stg %r0, 8(%r2)
22 store <4 x i31> %src, <4 x i31>* %p
26 ; Store a <16 x i1> vector.
27 define i16 @fun1(<16 x i1> %src)
30 ; CHECK-NEXT: aghi %r15, -168
31 ; CHECK-NEXT: .cfi_def_cfa_offset 328
32 ; CHECK-NEXT: vlgvb %r0, %v24, 0
33 ; CHECK-NEXT: vlgvb %r1, %v24, 1
34 ; CHECK-NEXT: risblg %r0, %r0, 16, 144, 15
35 ; CHECK-NEXT: rosbg %r0, %r1, 49, 49, 14
36 ; CHECK-NEXT: vlgvb %r1, %v24, 2
37 ; CHECK-NEXT: rosbg %r0, %r1, 50, 50, 13
38 ; CHECK-NEXT: vlgvb %r1, %v24, 3
39 ; CHECK-NEXT: rosbg %r0, %r1, 51, 51, 12
40 ; CHECK-NEXT: vlgvb %r1, %v24, 4
41 ; CHECK-NEXT: rosbg %r0, %r1, 52, 52, 11
42 ; CHECK-NEXT: vlgvb %r1, %v24, 5
43 ; CHECK-NEXT: rosbg %r0, %r1, 53, 53, 10
44 ; CHECK-NEXT: vlgvb %r1, %v24, 6
45 ; CHECK-NEXT: rosbg %r0, %r1, 54, 54, 9
46 ; CHECK-NEXT: vlgvb %r1, %v24, 7
47 ; CHECK-NEXT: rosbg %r0, %r1, 55, 55, 8
48 ; CHECK-NEXT: vlgvb %r1, %v24, 8
49 ; CHECK-NEXT: rosbg %r0, %r1, 56, 56, 7
50 ; CHECK-NEXT: vlgvb %r1, %v24, 9
51 ; CHECK-NEXT: rosbg %r0, %r1, 57, 57, 6
52 ; CHECK-NEXT: vlgvb %r1, %v24, 10
53 ; CHECK-NEXT: rosbg %r0, %r1, 58, 58, 5
54 ; CHECK-NEXT: vlgvb %r1, %v24, 11
55 ; CHECK-NEXT: rosbg %r0, %r1, 59, 59, 4
56 ; CHECK-NEXT: vlgvb %r1, %v24, 12
57 ; CHECK-NEXT: rosbg %r0, %r1, 60, 60, 3
58 ; CHECK-NEXT: vlgvb %r1, %v24, 13
59 ; CHECK-NEXT: rosbg %r0, %r1, 61, 61, 2
60 ; CHECK-NEXT: vlgvb %r1, %v24, 14
61 ; CHECK-NEXT: rosbg %r0, %r1, 62, 62, 1
62 ; CHECK-NEXT: vlgvb %r1, %v24, 15
63 ; CHECK-NEXT: rosbg %r0, %r1, 63, 63, 0
64 ; CHECK-NEXT: llhr %r2, %r0
65 ; CHECK-NEXT: aghi %r15, 168
68 %res = bitcast <16 x i1> %src to i16
72 ; Truncate a <8 x i32> vector to <8 x i31> and store it (test splitting).
73 define void @fun2(<8 x i32> %src, <8 x i31>* %p)
76 ; CHECK-NEXT: stmg %r14, %r15, 112(%r15)
77 ; CHECK-NEXT: .cfi_offset %r14, -48
78 ; CHECK-NEXT: .cfi_offset %r15, -40
79 ; CHECK-NEXT: vlgvf %r0, %v26, 3
80 ; CHECK-NEXT: vlgvf %r4, %v24, 1
81 ; CHECK-NEXT: vlgvf %r3, %v24, 2
82 ; CHECK-NEXT: srlk %r1, %r0, 8
83 ; CHECK-NEXT: vlgvf %r5, %v24, 0
84 ; CHECK-NEXT: sth %r1, 28(%r2)
85 ; CHECK-NEXT: risbgn %r1, %r4, 0, 133, 58
86 ; CHECK-NEXT: sllg %r5, %r5, 25
87 ; CHECK-NEXT: stc %r0, 30(%r2)
88 ; CHECK-NEXT: rosbg %r1, %r3, 6, 36, 27
89 ; CHECK-NEXT: vlgvf %r3, %v24, 3
90 ; CHECK-NEXT: rosbg %r5, %r4, 39, 63, 58
91 ; CHECK-NEXT: sllg %r4, %r5, 8
92 ; CHECK-NEXT: rosbg %r1, %r3, 37, 63, 60
93 ; CHECK-NEXT: vlgvf %r5, %v26, 1
94 ; CHECK-NEXT: rosbg %r4, %r1, 56, 63, 8
95 ; CHECK-NEXT: stg %r4, 0(%r2)
96 ; CHECK-NEXT: vlgvf %r4, %v26, 2
97 ; CHECK-NEXT: risbgn %r14, %r5, 0, 129, 62
98 ; CHECK-NEXT: risbgn %r3, %r3, 0, 131, 60
99 ; CHECK-NEXT: rosbg %r14, %r4, 2, 32, 31
100 ; CHECK-NEXT: rosbg %r14, %r0, 33, 63, 0
101 ; CHECK-NEXT: srlg %r0, %r14, 24
102 ; CHECK-NEXT: st %r0, 24(%r2)
103 ; CHECK-NEXT: vlgvf %r0, %v26, 0
104 ; CHECK-NEXT: rosbg %r3, %r0, 4, 34, 29
105 ; CHECK-NEXT: sllg %r0, %r1, 8
106 ; CHECK-NEXT: rosbg %r3, %r5, 35, 63, 62
107 ; CHECK-NEXT: rosbg %r0, %r3, 56, 63, 8
108 ; CHECK-NEXT: stg %r0, 8(%r2)
109 ; CHECK-NEXT: sllg %r0, %r3, 8
110 ; CHECK-NEXT: rosbg %r0, %r14, 56, 63, 8
111 ; CHECK-NEXT: stg %r0, 16(%r2)
112 ; CHECK-NEXT: lmg %r14, %r15, 112(%r15)
113 ; CHECK-NEXT: br %r14
115 %tmp = trunc <8 x i32> %src to <8 x i31>
116 store <8 x i31> %tmp, <8 x i31>* %p
120 ; Load and store a <3 x i31> vector (test widening).
121 define void @fun3(<3 x i31>* %src, <3 x i31>* %p)
124 ; CHECK-NEXT: llgf %r0, 3(%r2)
125 ; CHECK-NEXT: llgf %r1, 6(%r2)
126 ; CHECK-NEXT: llgf %r2, 0(%r2)
127 ; CHECK-NEXT: rosbg %r1, %r0, 0, 32, 31
128 ; CHECK-NEXT: sllg %r4, %r2, 62
129 ; CHECK-NEXT: rosbg %r4, %r0, 0, 32, 31
130 ; CHECK-NEXT: srlg %r0, %r4, 32
131 ; CHECK-NEXT: st %r1, 8(%r3)
132 ; CHECK-NEXT: sllg %r1, %r2, 30
133 ; CHECK-NEXT: lr %r1, %r0
134 ; CHECK-NEXT: nihh %r1, 8191
135 ; CHECK-NEXT: stg %r1, 0(%r3)
136 ; CHECK-NEXT: br %r14
138 %tmp = load <3 x i31>, <3 x i31>* %src
139 store <3 x i31> %tmp, <3 x i31>* %p