1 ; RUN: llc < %s | FileCheck %s
3 target datalayout = "e-m:w-i64:64-f80:128-n8:16:32:64-S128"
4 target triple = "x86_64-pc-windows-msvc"
6 declare i32 @__CxxFrameHandler3(...)
7 declare void @throw() noreturn uwtable
9 declare void @llvm.trap()
11 define i8* @reload_out_of_pad(i8* %arg) #0 personality i32 (...)* @__CxxFrameHandler3 {
14 to label %unreachable unwind label %catch.dispatch
17 %cp = catchpad within %cs [i8* null, i32 0, i8* null]
18 catchret from %cp to label %return
20 ; This block *must* appear after the catchret to test the bug.
21 ; FIXME: Make this an MIR test so we can control MBB layout.
23 call void @llvm.trap()
27 %cs = catchswitch within none [label %catch] unwind to caller
33 ; CHECK-LABEL: reload_out_of_pad: # @reload_out_of_pad
34 ; CHECK: movq %rcx, -[[arg_slot:[0-9]+]](%rbp) # 8-byte Spill
37 ; CHECK: movq -[[arg_slot]](%rbp), %rax # 8-byte Reload
40 ; CHECK: "?catch${{[0-9]+}}@?0?reload_out_of_pad@4HA":
44 define i8* @spill_in_pad() #0 personality i32 (...)* @__CxxFrameHandler3 {
47 to label %unreachable unwind label %catch.dispatch
50 %cp = catchpad within %cs [i8* null, i32 0, i8* null]
51 %val = call i8* @getval() [ "funclet"(token %cp) ]
52 catchret from %cp to label %return
55 call void @llvm.trap()
59 %cs = catchswitch within none [label %catch] unwind to caller
65 ; CHECK-LABEL: spill_in_pad: # @spill_in_pad
68 ; CHECK: movq -[[val_slot:[0-9]+]](%rbp), %rax # 8-byte Reload
71 ; CHECK: "?catch${{[0-9]+}}@?0?spill_in_pad@4HA":
73 ; CHECK: movq %rax, -[[val_slot]](%rbp) # 8-byte Spill
76 attributes #0 = { uwtable }