1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=-avx,+sse2 -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,SSE
3 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
4 ; RUN: llc < %s -disable-peephole -mtriple=x86_64-apple-darwin -mattr=+avx512f,+avx512bw,+avx512dq,+avx512vl -show-mc-encoding | FileCheck %s --check-prefixes=CHECK,AVX,AVX512
6 define <2 x double> @test_x86_sse2_cvtsi642sd(<2 x double> %a0, i64 %a1) {
7 ; SSE-LABEL: test_x86_sse2_cvtsi642sd:
9 ; SSE-NEXT: cvtsi2sd %rdi, %xmm0 ## encoding: [0xf2,0x48,0x0f,0x2a,0xc7]
10 ; SSE-NEXT: retq ## encoding: [0xc3]
12 ; AVX1-LABEL: test_x86_sse2_cvtsi642sd:
14 ; AVX1-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0 ## encoding: [0xc4,0xe1,0xfb,0x2a,0xc7]
15 ; AVX1-NEXT: retq ## encoding: [0xc3]
17 ; AVX512-LABEL: test_x86_sse2_cvtsi642sd:
19 ; AVX512-NEXT: vcvtsi2sd %rdi, %xmm0, %xmm0 ## EVEX TO VEX Compression encoding: [0xc4,0xe1,0xfb,0x2a,0xc7]
20 ; AVX512-NEXT: retq ## encoding: [0xc3]
21 %res = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> %a0, i64 %a1) ; <<2 x double>> [#uses=1]
24 declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone