1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32
3 ; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X64
5 define void @t1(float* %R, <4 x float>* %P1) nounwind {
8 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
9 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
10 ; X32-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
11 ; X32-NEXT: movss %xmm0, (%eax)
16 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
17 ; X64-NEXT: movss %xmm0, (%rdi)
19 %X = load <4 x float>, <4 x float>* %P1
20 %tmp = extractelement <4 x float> %X, i32 3
21 store float %tmp, float* %R
25 define float @t2(<4 x float>* %P1) nounwind {
28 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
29 ; X32-NEXT: flds 8(%eax)
34 ; X64-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
36 %X = load <4 x float>, <4 x float>* %P1
37 %tmp = extractelement <4 x float> %X, i32 2
41 define void @t3(i32* %R, <4 x i32>* %P1) nounwind {
44 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
45 ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
46 ; X32-NEXT: movl 12(%ecx), %ecx
47 ; X32-NEXT: movl %ecx, (%eax)
52 ; X64-NEXT: movl 12(%rsi), %eax
53 ; X64-NEXT: movl %eax, (%rdi)
55 %X = load <4 x i32>, <4 x i32>* %P1
56 %tmp = extractelement <4 x i32> %X, i32 3
57 store i32 %tmp, i32* %R
61 define i32 @t4(<4 x i32>* %P1) nounwind {
64 ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
65 ; X32-NEXT: movl 12(%eax), %eax
70 ; X64-NEXT: movl 12(%rdi), %eax
72 %X = load <4 x i32>, <4 x i32>* %P1
73 %tmp = extractelement <4 x i32> %X, i32 3