1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE
3 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X64-SSE
4 ; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-AVX
5 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=X64-AVX
7 define i64 @extract_any_extend_vector_inreg_v16i64(<16 x i64> %a0, i32 %a1) nounwind {
8 ; X32-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
10 ; X32-SSE-NEXT: pushl %ebp
11 ; X32-SSE-NEXT: movl %esp, %ebp
12 ; X32-SSE-NEXT: andl $-128, %esp
13 ; X32-SSE-NEXT: subl $384, %esp # imm = 0x180
14 ; X32-SSE-NEXT: movl 88(%ebp), %ecx
15 ; X32-SSE-NEXT: movdqa 72(%ebp), %xmm0
16 ; X32-SSE-NEXT: psrldq {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
17 ; X32-SSE-NEXT: xorps %xmm1, %xmm1
18 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
19 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
20 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
21 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
22 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
23 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
24 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
25 ; X32-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
26 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
27 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
28 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
29 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
30 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
31 ; X32-SSE-NEXT: movaps %xmm1, {{[0-9]+}}(%esp)
32 ; X32-SSE-NEXT: movaps %xmm1, (%esp)
33 ; X32-SSE-NEXT: movdqa %xmm0, {{[0-9]+}}(%esp)
34 ; X32-SSE-NEXT: leal (%ecx,%ecx), %eax
35 ; X32-SSE-NEXT: andl $31, %eax
36 ; X32-SSE-NEXT: movl 128(%esp,%eax,4), %eax
37 ; X32-SSE-NEXT: leal 1(%ecx,%ecx), %ecx
38 ; X32-SSE-NEXT: andl $31, %ecx
39 ; X32-SSE-NEXT: movl (%esp,%ecx,4), %edx
40 ; X32-SSE-NEXT: movl %ebp, %esp
41 ; X32-SSE-NEXT: popl %ebp
44 ; X64-SSE-LABEL: extract_any_extend_vector_inreg_v16i64:
46 ; X64-SSE-NEXT: pushq %rbp
47 ; X64-SSE-NEXT: movq %rsp, %rbp
48 ; X64-SSE-NEXT: andq $-128, %rsp
49 ; X64-SSE-NEXT: subq $256, %rsp # imm = 0x100
50 ; X64-SSE-NEXT: # kill: def $edi killed $edi def $rdi
51 ; X64-SSE-NEXT: psrldq {{.*#+}} xmm7 = xmm7[8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero
52 ; X64-SSE-NEXT: xorps %xmm0, %xmm0
53 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
54 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
55 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
56 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
57 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
58 ; X64-SSE-NEXT: movaps %xmm0, {{[0-9]+}}(%rsp)
59 ; X64-SSE-NEXT: movaps %xmm0, (%rsp)
60 ; X64-SSE-NEXT: movdqa %xmm7, {{[0-9]+}}(%rsp)
61 ; X64-SSE-NEXT: andl $15, %edi
62 ; X64-SSE-NEXT: movq (%rsp,%rdi,8), %rax
63 ; X64-SSE-NEXT: movq %rbp, %rsp
64 ; X64-SSE-NEXT: popq %rbp
67 ; X32-AVX-LABEL: extract_any_extend_vector_inreg_v16i64:
69 ; X32-AVX-NEXT: pushl %ebp
70 ; X32-AVX-NEXT: movl %esp, %ebp
71 ; X32-AVX-NEXT: andl $-128, %esp
72 ; X32-AVX-NEXT: subl $384, %esp # imm = 0x180
73 ; X32-AVX-NEXT: movl 40(%ebp), %ecx
74 ; X32-AVX-NEXT: vpbroadcastq 32(%ebp), %ymm0
75 ; X32-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
76 ; X32-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
77 ; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
78 ; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
79 ; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
80 ; X32-AVX-NEXT: vmovdqa %ymm0, {{[0-9]+}}(%esp)
81 ; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
82 ; X32-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%esp)
83 ; X32-AVX-NEXT: vmovaps %ymm1, (%esp)
84 ; X32-AVX-NEXT: vmovdqa %ymm0, {{[0-9]+}}(%esp)
85 ; X32-AVX-NEXT: leal (%ecx,%ecx), %eax
86 ; X32-AVX-NEXT: andl $31, %eax
87 ; X32-AVX-NEXT: movl 128(%esp,%eax,4), %eax
88 ; X32-AVX-NEXT: leal 1(%ecx,%ecx), %ecx
89 ; X32-AVX-NEXT: andl $31, %ecx
90 ; X32-AVX-NEXT: movl (%esp,%ecx,4), %edx
91 ; X32-AVX-NEXT: movl %ebp, %esp
92 ; X32-AVX-NEXT: popl %ebp
93 ; X32-AVX-NEXT: vzeroupper
96 ; X64-AVX-LABEL: extract_any_extend_vector_inreg_v16i64:
98 ; X64-AVX-NEXT: pushq %rbp
99 ; X64-AVX-NEXT: movq %rsp, %rbp
100 ; X64-AVX-NEXT: andq $-128, %rsp
101 ; X64-AVX-NEXT: subq $256, %rsp # imm = 0x100
102 ; X64-AVX-NEXT: # kill: def $edi killed $edi def $rdi
103 ; X64-AVX-NEXT: vpermq {{.*#+}} ymm0 = ymm3[3,1,2,3]
104 ; X64-AVX-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
105 ; X64-AVX-NEXT: vxorps %xmm1, %xmm1, %xmm1
106 ; X64-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
107 ; X64-AVX-NEXT: vmovaps %ymm1, {{[0-9]+}}(%rsp)
108 ; X64-AVX-NEXT: vmovaps %ymm1, (%rsp)
109 ; X64-AVX-NEXT: vmovdqa %ymm0, {{[0-9]+}}(%rsp)
110 ; X64-AVX-NEXT: andl $15, %edi
111 ; X64-AVX-NEXT: movq (%rsp,%rdi,8), %rax
112 ; X64-AVX-NEXT: movq %rbp, %rsp
113 ; X64-AVX-NEXT: popq %rbp
114 ; X64-AVX-NEXT: vzeroupper
116 %1 = extractelement <16 x i64> %a0, i32 15
117 %2 = insertelement <16 x i64> zeroinitializer, i64 %1, i32 4
118 %3 = extractelement <16 x i64> %2, i32 %a1