1 //===-- CallingConvLower.cpp - Calling Conventions ------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the CCState class, used for lowering and implementing
11 // calling conventions.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/CodeGen/CallingConvLower.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineRegisterInfo.h"
18 #include "llvm/CodeGen/TargetLowering.h"
19 #include "llvm/CodeGen/TargetRegisterInfo.h"
20 #include "llvm/CodeGen/TargetSubtargetInfo.h"
21 #include "llvm/IR/DataLayout.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/ErrorHandling.h"
24 #include "llvm/Support/SaveAndRestore.h"
25 #include "llvm/Support/raw_ostream.h"
30 CCState::CCState(CallingConv::ID CC
, bool isVarArg
, MachineFunction
&mf
,
31 SmallVectorImpl
<CCValAssign
> &locs
, LLVMContext
&C
)
32 : CallingConv(CC
), IsVarArg(isVarArg
), MF(mf
),
33 TRI(*MF
.getSubtarget().getRegisterInfo()), Locs(locs
), Context(C
) {
39 UsedRegs
.resize((TRI
.getNumRegs()+31)/32);
42 /// Allocate space on the stack large enough to pass an argument by value.
43 /// The size and alignment information of the argument is encoded in
44 /// its parameter attribute.
45 void CCState::HandleByVal(unsigned ValNo
, MVT ValVT
,
46 MVT LocVT
, CCValAssign::LocInfo LocInfo
,
47 int MinSize
, int MinAlign
,
48 ISD::ArgFlagsTy ArgFlags
) {
49 unsigned Align
= ArgFlags
.getByValAlign();
50 unsigned Size
= ArgFlags
.getByValSize();
51 if (MinSize
> (int)Size
)
53 if (MinAlign
> (int)Align
)
55 ensureMaxAlignment(Align
);
56 MF
.getSubtarget().getTargetLowering()->HandleByVal(this, Size
, Align
);
57 Size
= unsigned(alignTo(Size
, MinAlign
));
58 unsigned Offset
= AllocateStack(Size
, Align
);
59 addLoc(CCValAssign::getMem(ValNo
, ValVT
, Offset
, LocVT
, LocInfo
));
62 /// Mark a register and all of its aliases as allocated.
63 void CCState::MarkAllocated(unsigned Reg
) {
64 for (MCRegAliasIterator
AI(Reg
, &TRI
, true); AI
.isValid(); ++AI
)
65 UsedRegs
[*AI
/32] |= 1 << (*AI
&31);
68 bool CCState::IsShadowAllocatedReg(unsigned Reg
) const {
69 if (!isAllocated(Reg
))
72 for (auto const &ValAssign
: Locs
) {
73 if (ValAssign
.isRegLoc()) {
74 for (MCRegAliasIterator
AI(ValAssign
.getLocReg(), &TRI
, true);
84 /// Analyze an array of argument values,
85 /// incorporating info about the formals into this state.
87 CCState::AnalyzeFormalArguments(const SmallVectorImpl
<ISD::InputArg
> &Ins
,
89 unsigned NumArgs
= Ins
.size();
91 for (unsigned i
= 0; i
!= NumArgs
; ++i
) {
92 MVT ArgVT
= Ins
[i
].VT
;
93 ISD::ArgFlagsTy ArgFlags
= Ins
[i
].Flags
;
94 if (Fn(i
, ArgVT
, ArgVT
, CCValAssign::Full
, ArgFlags
, *this)) {
96 dbgs() << "Formal argument #" << i
<< " has unhandled type "
97 << EVT(ArgVT
).getEVTString() << '\n';
99 llvm_unreachable(nullptr);
104 /// Analyze the return values of a function, returning true if the return can
105 /// be performed without sret-demotion and false otherwise.
106 bool CCState::CheckReturn(const SmallVectorImpl
<ISD::OutputArg
> &Outs
,
108 // Determine which register each value should be copied into.
109 for (unsigned i
= 0, e
= Outs
.size(); i
!= e
; ++i
) {
111 ISD::ArgFlagsTy ArgFlags
= Outs
[i
].Flags
;
112 if (Fn(i
, VT
, VT
, CCValAssign::Full
, ArgFlags
, *this))
118 /// Analyze the returned values of a return,
119 /// incorporating info about the result values into this state.
120 void CCState::AnalyzeReturn(const SmallVectorImpl
<ISD::OutputArg
> &Outs
,
122 // Determine which register each value should be copied into.
123 for (unsigned i
= 0, e
= Outs
.size(); i
!= e
; ++i
) {
125 ISD::ArgFlagsTy ArgFlags
= Outs
[i
].Flags
;
126 if (Fn(i
, VT
, VT
, CCValAssign::Full
, ArgFlags
, *this)) {
128 dbgs() << "Return operand #" << i
<< " has unhandled type "
129 << EVT(VT
).getEVTString() << '\n';
131 llvm_unreachable(nullptr);
136 /// Analyze the outgoing arguments to a call,
137 /// incorporating info about the passed values into this state.
138 void CCState::AnalyzeCallOperands(const SmallVectorImpl
<ISD::OutputArg
> &Outs
,
140 unsigned NumOps
= Outs
.size();
141 for (unsigned i
= 0; i
!= NumOps
; ++i
) {
142 MVT ArgVT
= Outs
[i
].VT
;
143 ISD::ArgFlagsTy ArgFlags
= Outs
[i
].Flags
;
144 if (Fn(i
, ArgVT
, ArgVT
, CCValAssign::Full
, ArgFlags
, *this)) {
146 dbgs() << "Call operand #" << i
<< " has unhandled type "
147 << EVT(ArgVT
).getEVTString() << '\n';
149 llvm_unreachable(nullptr);
154 /// Same as above except it takes vectors of types and argument flags.
155 void CCState::AnalyzeCallOperands(SmallVectorImpl
<MVT
> &ArgVTs
,
156 SmallVectorImpl
<ISD::ArgFlagsTy
> &Flags
,
158 unsigned NumOps
= ArgVTs
.size();
159 for (unsigned i
= 0; i
!= NumOps
; ++i
) {
160 MVT ArgVT
= ArgVTs
[i
];
161 ISD::ArgFlagsTy ArgFlags
= Flags
[i
];
162 if (Fn(i
, ArgVT
, ArgVT
, CCValAssign::Full
, ArgFlags
, *this)) {
164 dbgs() << "Call operand #" << i
<< " has unhandled type "
165 << EVT(ArgVT
).getEVTString() << '\n';
167 llvm_unreachable(nullptr);
172 /// Analyze the return values of a call, incorporating info about the passed
173 /// values into this state.
174 void CCState::AnalyzeCallResult(const SmallVectorImpl
<ISD::InputArg
> &Ins
,
176 for (unsigned i
= 0, e
= Ins
.size(); i
!= e
; ++i
) {
178 ISD::ArgFlagsTy Flags
= Ins
[i
].Flags
;
179 if (Fn(i
, VT
, VT
, CCValAssign::Full
, Flags
, *this)) {
181 dbgs() << "Call result #" << i
<< " has unhandled type "
182 << EVT(VT
).getEVTString() << '\n';
184 llvm_unreachable(nullptr);
189 /// Same as above except it's specialized for calls that produce a single value.
190 void CCState::AnalyzeCallResult(MVT VT
, CCAssignFn Fn
) {
191 if (Fn(0, VT
, VT
, CCValAssign::Full
, ISD::ArgFlagsTy(), *this)) {
193 dbgs() << "Call result has unhandled type "
194 << EVT(VT
).getEVTString() << '\n';
196 llvm_unreachable(nullptr);
200 static bool isValueTypeInRegForCC(CallingConv::ID CC
, MVT VT
) {
202 return true; // Assume -msse-regparm might be in effect.
205 if (CC
== CallingConv::X86_VectorCall
|| CC
== CallingConv::X86_FastCall
)
210 void CCState::getRemainingRegParmsForType(SmallVectorImpl
<MCPhysReg
> &Regs
,
211 MVT VT
, CCAssignFn Fn
) {
212 unsigned SavedStackOffset
= StackOffset
;
213 unsigned SavedMaxStackArgAlign
= MaxStackArgAlign
;
214 unsigned NumLocs
= Locs
.size();
216 // Set the 'inreg' flag if it is used for this calling convention.
217 ISD::ArgFlagsTy Flags
;
218 if (isValueTypeInRegForCC(CallingConv
, VT
))
221 // Allocate something of this value type repeatedly until we get assigned a
222 // location in memory.
223 bool HaveRegParm
= true;
224 while (HaveRegParm
) {
225 if (Fn(0, VT
, VT
, CCValAssign::Full
, Flags
, *this)) {
227 dbgs() << "Call has unhandled type " << EVT(VT
).getEVTString()
228 << " while computing remaining regparms\n";
230 llvm_unreachable(nullptr);
232 HaveRegParm
= Locs
.back().isRegLoc();
235 // Copy all the registers from the value locations we added.
236 assert(NumLocs
< Locs
.size() && "CC assignment failed to add location");
237 for (unsigned I
= NumLocs
, E
= Locs
.size(); I
!= E
; ++I
)
238 if (Locs
[I
].isRegLoc())
239 Regs
.push_back(MCPhysReg(Locs
[I
].getLocReg()));
241 // Clear the assigned values and stack memory. We leave the registers marked
242 // as allocated so that future queries don't return the same registers, i.e.
243 // when i64 and f64 are both passed in GPRs.
244 StackOffset
= SavedStackOffset
;
245 MaxStackArgAlign
= SavedMaxStackArgAlign
;
246 Locs
.resize(NumLocs
);
249 void CCState::analyzeMustTailForwardedRegisters(
250 SmallVectorImpl
<ForwardedRegister
> &Forwards
, ArrayRef
<MVT
> RegParmTypes
,
252 // Oftentimes calling conventions will not user register parameters for
253 // variadic functions, so we need to assume we're not variadic so that we get
254 // all the registers that might be used in a non-variadic call.
255 SaveAndRestore
<bool> SavedVarArg(IsVarArg
, false);
256 SaveAndRestore
<bool> SavedMustTail(AnalyzingMustTailForwardedRegs
, true);
258 for (MVT RegVT
: RegParmTypes
) {
259 SmallVector
<MCPhysReg
, 8> RemainingRegs
;
260 getRemainingRegParmsForType(RemainingRegs
, RegVT
, Fn
);
261 const TargetLowering
*TL
= MF
.getSubtarget().getTargetLowering();
262 const TargetRegisterClass
*RC
= TL
->getRegClassFor(RegVT
);
263 for (MCPhysReg PReg
: RemainingRegs
) {
264 unsigned VReg
= MF
.addLiveIn(PReg
, RC
);
265 Forwards
.push_back(ForwardedRegister(VReg
, PReg
, RegVT
));
270 bool CCState::resultsCompatible(CallingConv::ID CalleeCC
,
271 CallingConv::ID CallerCC
, MachineFunction
&MF
,
273 const SmallVectorImpl
<ISD::InputArg
> &Ins
,
274 CCAssignFn CalleeFn
, CCAssignFn CallerFn
) {
275 if (CalleeCC
== CallerCC
)
277 SmallVector
<CCValAssign
, 4> RVLocs1
;
278 CCState
CCInfo1(CalleeCC
, false, MF
, RVLocs1
, C
);
279 CCInfo1
.AnalyzeCallResult(Ins
, CalleeFn
);
281 SmallVector
<CCValAssign
, 4> RVLocs2
;
282 CCState
CCInfo2(CallerCC
, false, MF
, RVLocs2
, C
);
283 CCInfo2
.AnalyzeCallResult(Ins
, CallerFn
);
285 if (RVLocs1
.size() != RVLocs2
.size())
287 for (unsigned I
= 0, E
= RVLocs1
.size(); I
!= E
; ++I
) {
288 const CCValAssign
&Loc1
= RVLocs1
[I
];
289 const CCValAssign
&Loc2
= RVLocs2
[I
];
290 if (Loc1
.getLocInfo() != Loc2
.getLocInfo())
292 bool RegLoc1
= Loc1
.isRegLoc();
293 if (RegLoc1
!= Loc2
.isRegLoc())
296 if (Loc1
.getLocReg() != Loc2
.getLocReg())
299 if (Loc1
.getLocMemOffset() != Loc2
.getLocMemOffset())