1 # RUN: llc -march=hexagon -verify-machineinstrs -run-pass prologepilog -o - %s | FileCheck %s
3 # The PS_vstorerw_ai of W0 would normally expand into stores of V0 and V1,
4 # but both are clobbered by the regmask. Only V0 is re-defined before the
5 # store, so only V0 should be stored. LivePhysRegs didn't correctly remove
6 # registers clobbered by regmasks, so V1 also appeared to be live and was
7 # stored as well. This resulted in the "using undefined physical register"
10 # This will fail to compile with -verify-machineinstrs, but we can also check
11 # directly if the output is correct.
13 # CHECK: J2_call &__hexagon_divsi3
14 # CHECK: $v0 = V6_lvsplatw
15 # CHECK: V6_vS32b_ai $r29, 128, {{.*}} $v0
16 # CHECK-NOT: V6_vS32b_ai $r29, 192, {{.*}} $v1
19 tracksRegLiveness: true
21 - { id: 0, offset: 0, size: 128, alignment: 128 }
22 - { id: 1, offset: 128, size: 128, alignment: 128 }
23 - { id: 2, offset: 384, size: 128, alignment: 128 }
26 renamable $r0 = PS_fi %stack.0, 0
27 ADJCALLSTACKDOWN 0, 0, implicit-def $r29, implicit-def dead $r30, implicit $r31, implicit $r30, implicit $r29
28 renamable $w0 = PS_vloadrw_ai %stack.2, 0 :: (load 128 from %stack.2)
29 V6_vS32b_ai killed renamable $r0, 0, renamable $v1 :: (store 64 into %stack.0, align 128)
31 renamable $r1 = L2_loadri_io %stack.0, 4 :: (load 4 from %stack.0 + 4)
32 J2_call &__hexagon_divsi3, hexagoncsr, implicit-def dead $pc, implicit-def dead $r31, implicit $r29, implicit killed $r0, implicit killed $r1, implicit-def $r29, implicit-def $r0
33 ADJCALLSTACKUP 0, 0, implicit-def dead $r29, implicit-def dead $r30, implicit-def dead $r31, implicit $r29
34 renamable $v0 = V6_lvsplatw killed renamable $r0
35 PS_vstorerw_ai %stack.1, 0, killed renamable $w0 :: (store 128 into %stack.1)