1 //===- KnownBitsTest.cpp -------------------------------------------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
9 #include "GISelMITest.h"
10 #include "llvm/CodeGen/GlobalISel/GISelKnownBits.h"
11 #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
13 TEST_F(GISelMITest
, TestKnownBitsCst
) {
14 StringRef MIRString
= " %3:_(s8) = G_CONSTANT i8 1\n"
15 " %4:_(s8) = COPY %3\n";
19 unsigned CopyReg
= Copies
[Copies
.size() - 1];
20 MachineInstr
*FinalCopy
= MRI
->getVRegDef(CopyReg
);
21 unsigned SrcReg
= FinalCopy
->getOperand(1).getReg();
22 GISelKnownBits
Info(*MF
);
23 KnownBits Res
= Info
.getKnownBits(SrcReg
);
24 EXPECT_EQ((uint64_t)1, Res
.One
.getZExtValue());
25 EXPECT_EQ((uint64_t)0xfe, Res
.Zero
.getZExtValue());
28 TEST_F(GISelMITest
, TestKnownBits
) {
30 StringRef MIR
= " %3:_(s32) = G_TRUNC %0\n"
31 " %4:_(s32) = G_TRUNC %1\n"
32 " %5:_(s32) = G_CONSTANT i32 5\n"
33 " %6:_(s32) = G_CONSTANT i32 24\n"
34 " %7:_(s32) = G_CONSTANT i32 28\n"
35 " %14:_(p0) = G_INTTOPTR %7\n"
36 " %16:_(s32) = G_PTRTOINT %14\n"
37 " %8:_(s32) = G_SHL %3, %5\n"
38 " %9:_(s32) = G_SHL %4, %5\n"
39 " %10:_(s32) = G_OR %8, %6\n"
40 " %11:_(s32) = G_OR %9, %16\n"
41 " %12:_(s32) = G_MUL %10, %11\n"
42 " %13:_(s32) = COPY %12\n";
46 unsigned CopyReg
= Copies
[Copies
.size() - 1];
47 MachineInstr
*FinalCopy
= MRI
->getVRegDef(CopyReg
);
48 unsigned SrcReg
= FinalCopy
->getOperand(1).getReg();
49 GISelKnownBits
Info(*MF
);
50 KnownBits Known
= Info
.getKnownBits(SrcReg
);
51 EXPECT_FALSE(Known
.hasConflict());
52 EXPECT_EQ(0u, Known
.One
.getZExtValue());
53 EXPECT_EQ(31u, Known
.Zero
.getZExtValue());
54 APInt Zeroes
= Info
.getKnownZeroes(SrcReg
);
55 EXPECT_EQ(Known
.Zero
, Zeroes
);