[ARM] Split large truncating MVE stores
[llvm-complete.git] / test / CodeGen / MIR / AMDGPU / machine-function-info-register-parse-error2.mir
blobf3da77e2dec8335bd83790e94c9fc48831fc59bb
1 # RUN: not llc -march=amdgcn -run-pass none -o /dev/null %s 2>&1 | FileCheck %s
2 # CHECK: :7:21: unknown register name 'not_a_register_name'
3 # CHECK: scratchRSrcReg:  '$not_a_register_name'
4 ---
5 name: invalid_rsrc_reg
6 machineFunctionInfo:
7   scratchRSrcReg:  '$not_a_register_name'
8 body:             |
9   bb.0:
11     S_ENDPGM
12 ...