[ARM] VQADD instructions
[llvm-complete.git] / lib / Target / AVR / AVR.td
blob53768f99df3b492783be36e205679b282382fce5
1 //===-- AVR.td - Describe the AVR Target Machine ----------*- tablegen -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===---------------------------------------------------------------------===//
8 // This is the top level entry point for the AVR target.
9 //===---------------------------------------------------------------------===//
11 //===---------------------------------------------------------------------===//
12 // Target-independent interfaces which we are implementing
13 //===---------------------------------------------------------------------===//
15 include "llvm/Target/Target.td"
17 //===---------------------------------------------------------------------===//
18 // AVR Device Definitions
19 //===---------------------------------------------------------------------===//
21 include "AVRDevices.td"
23 //===---------------------------------------------------------------------===//
24 // Register File Description
25 //===---------------------------------------------------------------------===//
27 include "AVRRegisterInfo.td"
29 //===---------------------------------------------------------------------===//
30 // Instruction Descriptions
31 //===---------------------------------------------------------------------===//
33 include "AVRInstrInfo.td"
35 def AVRInstrInfo : InstrInfo;
37 //===---------------------------------------------------------------------===//
38 // Calling Conventions
39 //===---------------------------------------------------------------------===//
41 include "AVRCallingConv.td"
43 //===---------------------------------------------------------------------===//
44 // Assembly Printers
45 //===---------------------------------------------------------------------===//
47 def AVRAsmWriter : AsmWriter {
48  string AsmWriterClassName = "InstPrinter";
49  bit isMCAsmWriter = 1;
52 //===---------------------------------------------------------------------===//
53 // Assembly Parsers
54 //===---------------------------------------------------------------------===//
56 def AVRAsmParser : AsmParser {
57   let ShouldEmitMatchRegisterName = 1;
58   let ShouldEmitMatchRegisterAltName = 1;
61 def AVRAsmParserVariant : AsmParserVariant {
62   int Variant = 0;
64   // Recognize hard coded registers.
65   string RegisterPrefix = "$";
66   string TokenizingCharacters = "+";
69 //===---------------------------------------------------------------------===//
70 // Target Declaration
71 //===---------------------------------------------------------------------===//
73 def AVR : Target {
74   let InstructionSet         = AVRInstrInfo;
75   let AssemblyWriters        = [AVRAsmWriter];
77   let AssemblyParsers        = [AVRAsmParser];
78   let AssemblyParserVariants = [AVRAsmParserVariant];