[ARM] VQADD instructions
[llvm-complete.git] / lib / Target / PowerPC / PPCVSXCopy.cpp
blob3463bbbdc5f0e37b7405a7c9dc9da3a954e3d761
1 //===-------------- PPCVSXCopy.cpp - VSX Copy Legalization ----------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // A pass which deals with the complexity of generating legal VSX register
10 // copies to/from register classes which partially overlap with the VSX
11 // register file.
13 //===----------------------------------------------------------------------===//
15 #include "MCTargetDesc/PPCPredicates.h"
16 #include "PPC.h"
17 #include "PPCHazardRecognizers.h"
18 #include "PPCInstrBuilder.h"
19 #include "PPCInstrInfo.h"
20 #include "PPCMachineFunctionInfo.h"
21 #include "PPCTargetMachine.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/ADT/Statistic.h"
24 #include "llvm/CodeGen/MachineFrameInfo.h"
25 #include "llvm/CodeGen/MachineFunctionPass.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineMemOperand.h"
28 #include "llvm/CodeGen/MachineRegisterInfo.h"
29 #include "llvm/MC/MCAsmInfo.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/TargetRegistry.h"
33 #include "llvm/Support/raw_ostream.h"
35 using namespace llvm;
37 #define DEBUG_TYPE "ppc-vsx-copy"
39 namespace {
40 // PPCVSXCopy pass - For copies between VSX registers and non-VSX registers
41 // (Altivec and scalar floating-point registers), we need to transform the
42 // copies into subregister copies with other restrictions.
43 struct PPCVSXCopy : public MachineFunctionPass {
44 static char ID;
45 PPCVSXCopy() : MachineFunctionPass(ID) {
46 initializePPCVSXCopyPass(*PassRegistry::getPassRegistry());
49 const TargetInstrInfo *TII;
51 bool IsRegInClass(unsigned Reg, const TargetRegisterClass *RC,
52 MachineRegisterInfo &MRI) {
53 if (Register::isVirtualRegister(Reg)) {
54 return RC->hasSubClassEq(MRI.getRegClass(Reg));
55 } else if (RC->contains(Reg)) {
56 return true;
59 return false;
62 bool IsVSReg(unsigned Reg, MachineRegisterInfo &MRI) {
63 return IsRegInClass(Reg, &PPC::VSRCRegClass, MRI);
66 bool IsVRReg(unsigned Reg, MachineRegisterInfo &MRI) {
67 return IsRegInClass(Reg, &PPC::VRRCRegClass, MRI);
70 bool IsF8Reg(unsigned Reg, MachineRegisterInfo &MRI) {
71 return IsRegInClass(Reg, &PPC::F8RCRegClass, MRI);
74 bool IsVSFReg(unsigned Reg, MachineRegisterInfo &MRI) {
75 return IsRegInClass(Reg, &PPC::VSFRCRegClass, MRI);
78 bool IsVSSReg(unsigned Reg, MachineRegisterInfo &MRI) {
79 return IsRegInClass(Reg, &PPC::VSSRCRegClass, MRI);
82 protected:
83 bool processBlock(MachineBasicBlock &MBB) {
84 bool Changed = false;
86 MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
87 for (MachineInstr &MI : MBB) {
88 if (!MI.isFullCopy())
89 continue;
91 MachineOperand &DstMO = MI.getOperand(0);
92 MachineOperand &SrcMO = MI.getOperand(1);
94 if ( IsVSReg(DstMO.getReg(), MRI) &&
95 !IsVSReg(SrcMO.getReg(), MRI)) {
96 // This is a copy *to* a VSX register from a non-VSX register.
97 Changed = true;
99 const TargetRegisterClass *SrcRC = &PPC::VSLRCRegClass;
100 assert((IsF8Reg(SrcMO.getReg(), MRI) ||
101 IsVSSReg(SrcMO.getReg(), MRI) ||
102 IsVSFReg(SrcMO.getReg(), MRI)) &&
103 "Unknown source for a VSX copy");
105 Register NewVReg = MRI.createVirtualRegister(SrcRC);
106 BuildMI(MBB, MI, MI.getDebugLoc(),
107 TII->get(TargetOpcode::SUBREG_TO_REG), NewVReg)
108 .addImm(1) // add 1, not 0, because there is no implicit clearing
109 // of the high bits.
110 .add(SrcMO)
111 .addImm(PPC::sub_64);
113 // The source of the original copy is now the new virtual register.
114 SrcMO.setReg(NewVReg);
115 } else if (!IsVSReg(DstMO.getReg(), MRI) &&
116 IsVSReg(SrcMO.getReg(), MRI)) {
117 // This is a copy *from* a VSX register to a non-VSX register.
118 Changed = true;
120 const TargetRegisterClass *DstRC = &PPC::VSLRCRegClass;
121 assert((IsF8Reg(DstMO.getReg(), MRI) ||
122 IsVSFReg(DstMO.getReg(), MRI) ||
123 IsVSSReg(DstMO.getReg(), MRI)) &&
124 "Unknown destination for a VSX copy");
126 // Copy the VSX value into a new VSX register of the correct subclass.
127 Register NewVReg = MRI.createVirtualRegister(DstRC);
128 BuildMI(MBB, MI, MI.getDebugLoc(), TII->get(TargetOpcode::COPY),
129 NewVReg)
130 .add(SrcMO);
132 // Transform the original copy into a subregister extraction copy.
133 SrcMO.setReg(NewVReg);
134 SrcMO.setSubReg(PPC::sub_64);
138 return Changed;
141 public:
142 bool runOnMachineFunction(MachineFunction &MF) override {
143 // If we don't have VSX on the subtarget, don't do anything.
144 const PPCSubtarget &STI = MF.getSubtarget<PPCSubtarget>();
145 if (!STI.hasVSX())
146 return false;
147 TII = STI.getInstrInfo();
149 bool Changed = false;
151 for (MachineFunction::iterator I = MF.begin(); I != MF.end();) {
152 MachineBasicBlock &B = *I++;
153 if (processBlock(B))
154 Changed = true;
157 return Changed;
160 void getAnalysisUsage(AnalysisUsage &AU) const override {
161 MachineFunctionPass::getAnalysisUsage(AU);
166 INITIALIZE_PASS(PPCVSXCopy, DEBUG_TYPE,
167 "PowerPC VSX Copy Legalization", false, false)
169 char PPCVSXCopy::ID = 0;
170 FunctionPass*
171 llvm::createPPCVSXCopyPass() { return new PPCVSXCopy(); }