| commit | b205c711b52431a3d6fd57db12b0f4e45331d1cb | |
| author | Petar Avramovic <Petar.Avramovic@rt-rk.com> | |
| Mon, 8 Jul 2019 14:45:52 +0000 (8 14:45 +0000) | ||
| committer | Petar Avramovic <Petar.Avramovic@rt-rk.com> | |
| Mon, 8 Jul 2019 14:45:52 +0000 (8 14:45 +0000) | ||
| tree | 5f0215f3d2dc2555a9da028dbe2dcabfb4820777 | treesnapshot (tar.gz zip) |
| parent | 4596dafe75174ecb4ce012e90f5420f4aeb6a130 | commitdiff |
[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load
Select gprb or fprb when loaded value is used by either:
copy to physical register or
instruction with only one mapping available for that use operand.
Load of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.
Differential Revision: https://reviews.llvm.org/D64269
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365323 91177308-0d34-0410-b5e6-96231b3b80d8
Select gprb or fprb when loaded value is used by either:
copy to physical register or
instruction with only one mapping available for that use operand.
Load of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.
Differential Revision: https://reviews.llvm.org/D64269
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365323 91177308-0d34-0410-b5e6-96231b3b80d8
| lib/Target/Mips/MipsLegalizerInfo.cpp | diffblobblamehistory | |
| lib/Target/Mips/MipsRegisterBankInfo.cpp | diffblobblamehistory | |
| lib/Target/Mips/MipsRegisterBankInfo.h | diffblobblamehistory | |
| test/CodeGen/Mips/GlobalISel/legalizer/load.mir | [new file with mode: 0644] | blob |
| test/CodeGen/Mips/GlobalISel/llvm-ir/load.ll | [new file with mode: 0644] | blob |
| test/CodeGen/Mips/GlobalISel/regbankselect/load.mir | [new file with mode: 0644] | blob |