[MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store
commiteda0b2c28675418ea8847549eaec2a50bc4dcd86
authorPetar Avramovic <Petar.Avramovic@rt-rk.com>
Tue, 15 Oct 2019 09:30:08 +0000 (15 09:30 +0000)
committerPetar Avramovic <Petar.Avramovic@rt-rk.com>
Tue, 15 Oct 2019 09:30:08 +0000 (15 09:30 +0000)
treede0abd731670409a051538fba2dcd7585733e933
parent7c11fe487a98579ce6aa26d9f50adad3d9789d07
[MIPS GlobalISel] Add MSA registers to fprb. Select vector load, store

Add vector MSA register classes to fprb, they are 128 bit wide.
MSA instructions use the same registers for both integer and floating
point operations. Therefore we only need to check for vector element
size during legalization or instruction selection.

Add helper function in MipsLegalizerInfo and switch to legalIf
LegalizeRuleSet to keep legalization rules compact since they depend
on MipsSubtarget and presence of MSA.
fprb is assigned to all vector operands.
Move selectLoadStoreOpCode to MipsInstructionSelector in order to
reduce number of arguments.

Differential Revision: https://reviews.llvm.org/D68867

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@374872 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsInstructionSelector.cpp
lib/Target/Mips/MipsLegalizerInfo.cpp
lib/Target/Mips/MipsRegisterBankInfo.cpp
lib/Target/Mips/MipsRegisterBanks.td
test/CodeGen/Mips/GlobalISel/instruction-select/load_store_vec.mir [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/legalizer/load_store_vec.mir [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/llvm-ir/load_store_vec.ll [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/regbankselect/load_store_vec.mir [new file with mode: 0644]