1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple=aarch64-apple-darwin -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
10 tracksRegLiveness: true
11 machineFunctionInfo: {}
14 liveins: $s0, $s1, $w0
16 ; CHECK-LABEL: name: select_f32
17 ; CHECK: liveins: $s0, $s1, $w0
18 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
19 ; CHECK: [[COPY1:%[0-9]+]]:fpr32 = COPY $s0
20 ; CHECK: [[COPY2:%[0-9]+]]:fpr32 = COPY $s1
21 ; CHECK: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
22 ; CHECK: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
23 ; CHECK: $wzr = ANDSWri [[COPY4]], 0, implicit-def $nzcv
24 ; CHECK: [[FCSELSrrr:%[0-9]+]]:fpr32 = FCSELSrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
25 ; CHECK: $s0 = COPY [[FCSELSrrr]]
26 ; CHECK: RET_ReallyLR implicit $s0
27 %3:gpr(s32) = COPY $w0
28 %0:gpr(s1) = G_TRUNC %3(s32)
29 %1:fpr(s32) = COPY $s0
30 %2:fpr(s32) = COPY $s1
31 %5:fpr(s1) = COPY %0(s1)
32 %4:fpr(s32) = G_SELECT %5(s1), %1, %2
34 RET_ReallyLR implicit $s0
42 tracksRegLiveness: true
43 machineFunctionInfo: {}
46 liveins: $d0, $d1, $w0
48 ; CHECK-LABEL: name: select_f64
49 ; CHECK: liveins: $d0, $d1, $w0
50 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
51 ; CHECK: [[COPY1:%[0-9]+]]:fpr64 = COPY $d0
52 ; CHECK: [[COPY2:%[0-9]+]]:fpr64 = COPY $d1
53 ; CHECK: [[COPY3:%[0-9]+]]:fpr32 = COPY [[COPY]]
54 ; CHECK: [[COPY4:%[0-9]+]]:gpr32 = COPY [[COPY3]]
55 ; CHECK: $wzr = ANDSWri [[COPY4]], 0, implicit-def $nzcv
56 ; CHECK: [[FCSELDrrr:%[0-9]+]]:fpr64 = FCSELDrrr [[COPY1]], [[COPY2]], 1, implicit $nzcv
57 ; CHECK: $d0 = COPY [[FCSELDrrr]]
58 ; CHECK: RET_ReallyLR implicit $d0
59 %3:gpr(s32) = COPY $w0
60 %0:gpr(s1) = G_TRUNC %3(s32)
61 %1:fpr(s64) = COPY $d0
62 %2:fpr(s64) = COPY $d1
63 %5:fpr(s1) = COPY %0(s1)
64 %4:fpr(s64) = G_SELECT %5(s1), %1, %2
66 RET_ReallyLR implicit $d0