[AMDGPU] Check for immediate SrcC in mfma in AsmParser
[llvm-core.git] / test / MC / AMDGPU / expressions-gfx10.s
blobbca8444f80bffe74a8bef146c266240a09ff9fd6
1 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -show-encoding %s | FileCheck %s --check-prefix=GFX10
3 i1=1
5 //===----------------------------------------------------------------------===//
6 // Constant expressions may be used where literals are accepted.
7 //===----------------------------------------------------------------------===//
9 v_bfe_u32 v0, i1+100, v1, v2
10 // GFX10: v_bfe_u32 v0, 0x65, v1, v2 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,0x65,0x00,0x00,0x00]
12 v_bfe_u32 v0, v1, i1-100, v2
13 // GFX10: v_bfe_u32 v0, v1, 0xffffff9d, v2 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,0x9d,0xff,0xff,0xff]
15 v_bfe_u32 v0, v1, v2, (i1+100)*2
16 // GFX10: v_bfe_u32 v0, v1, v2, 0xca ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,0xca,0x00,0x00,0x00]
18 v_cmp_f_i32 s[10:11], (i1+100)*2, v2
19 // GFX10: v_cmp_f_i32_e64 s[10:11], 0xca, v2 ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,0xca,0x00,0x00,0x00]
21 v_cmpx_f_i64 v[1:2], i1+100
22 // GFX10: v_cmpx_f_i64_e64 v[1:2], 0x65 ; encoding: [0x00,0x00,0xb0,0xd4,0x01,0xff,0x01,0x00,0x65,0x00,0x00,0x00]
24 v_lshlrev_b64 v[5:6], i1+0xFFE, v[2:3]
25 // GFX10: v_lshlrev_b64 v[5:6], 0xfff, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,0xff,0x0f,0x00,0x00]
27 //===----------------------------------------------------------------------===//
28 // Relocatable expressions can be used with 32-bit instructions.
29 //===----------------------------------------------------------------------===//
31 v_bfe_u32 v0, u, v1, v2
32 // GFX10: v_bfe_u32 v0, u, v1, v2 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x0a,0x04,A,A,A,A]
33 // GFX10-NEXT: ; fixup A - offset: 8, value: u, kind: FK_PCRel_4
35 v_bfe_u32 v0, v1, u-1, v2
36 // GFX10: v_bfe_u32 v0, v1, u-1, v2 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xff,0x09,0x04,A,A,A,A]
37 // GFX10-NEXT: ; fixup A - offset: 8, value: u-1, kind: FK_Data_4
39 v_bfe_u32 v0, v1, v2, u+1
40 // GFX10: v_bfe_u32 v0, v1, v2, u+1 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0x05,0xfe,0x03,A,A,A,A]
41 // GFX10-NEXT: ; fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
43 v_cmp_f_i32 s[10:11], u+1, v2
44 // GFX10: v_cmp_f_i32_e64 s[10:11], u+1, v2 ; encoding: [0x0a,0x00,0x80,0xd4,0xff,0x04,0x02,0x00,A,A,A,A]
45 // GFX10-NEXT: ; fixup A - offset: 8, value: u+1, kind: FK_PCRel_4
47 v_lshlrev_b64 v[5:6], u-1, v[2:3]
48 // GFX10: v_lshlrev_b64 v[5:6], u-1, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,A,A,A,A]
49 // GFX10-NEXT: ; fixup A - offset: 8, value: u-1, kind: FK_Data_4