[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / fadda-diagnostics.s
blob2b54beada2d4446fa0c4f9f8bacf1d038918d3d4
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
3 fadda b0, p7, b0, z31.b
4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
5 // CHECK-NEXT: fadda b0, p7, b0, z31.b
6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
8 fadda h0, p7, h1, z31.h
9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: operand must match destination register
10 // CHECK-NEXT: fadda h0, p7, h1, z31.h
11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
13 fadda v0.8h, p7, v0.8h, z31.h
14 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
15 // CHECK-NEXT: fadda v0.8h, p7, v0.8h, z31.h
16 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
19 // ------------------------------------------------------------------------- //
20 // Invalid predicate operand
22 fadda h0, p8, h0, z31.h
23 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
24 // CHECK-NEXT: fadda h0, p8, h0, z31.h
25 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
27 fadda h0, p7.b, h0, z31.h
28 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
29 // CHECK-NEXT: fadda h0, p7.b, h0, z31.h
30 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
32 fadda h0, p7.q, h0, z31.h
33 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid restricted predicate register, expected p0..p7 (without element suffix)
34 // CHECK-NEXT: fadda h0, p7.q, h0, z31.h
35 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
38 // --------------------------------------------------------------------------//
39 // Negative tests for instructions that are incompatible with movprfx
41 movprfx z31.d, p7/z, z6.d
42 fadda d0, p7, d0, z31.d
43 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
44 // CHECK-NEXT: fadda d0, p7, d0, z31.d
45 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
47 movprfx z31, z6
48 fadda d0, p7, d0, z31.d
49 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
50 // CHECK-NEXT: fadda d0, p7, d0, z31.d
51 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: