[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / fcmeq-diagnostics.s
blob08dc7dc4010cf613200ce6f4b3696b307e0dbc9b
1 // RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve 2>&1 < %s| FileCheck %s
3 fcmeq p0.b, p0/z, z0.b, z0.b
4 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid predicate register
5 // CHECK-NEXT: fcmeq p0.b, p0/z, z0.b, z0.b
6 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
8 fcmeq p0.s, p0/z, z0.s, #1.0
9 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: expected floating-point constant #0.0
10 // CHECK-NEXT: fcmeq p0.s, p0/z, z0.s, #1.0
11 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
14 // --------------------------------------------------------------------------//
15 // Negative tests for instructions that are incompatible with movprfx
17 movprfx z0.d, p0/z, z7.d
18 fcmeq p0.d, p0/z, z0.d, #0.0
19 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
20 // CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
21 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
23 movprfx z0, z7
24 fcmeq p0.d, p0/z, z0.d, #0.0
25 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
26 // CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, #0.0
27 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
29 movprfx z0.d, p0/z, z7.d
30 fcmeq p0.d, p0/z, z0.d, z1.d
31 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
32 // CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
33 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
35 movprfx z0, z7
36 fcmeq p0.d, p0/z, z0.d, z1.d
37 // CHECK: [[@LINE-1]]:{{[0-9]+}}: error: instruction is unpredictable when following a movprfx, suggest replacing movprfx with mov
38 // CHECK-NEXT: fcmeq p0.d, p0/z, z0.d, z1.d
39 // CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}: