[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / fmul.s
blob3cf35f33f8ca538664606e3ead3e028d20b80d05
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 fmul z0.h, p0/m, z0.h, #0.5000000000000
11 // CHECK-INST: fmul z0.h, p0/m, z0.h, #0.5
12 // CHECK-ENCODING: [0x00,0x80,0x5a,0x65]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 80 5a 65 <unknown>
16 fmul z0.h, p0/m, z0.h, #0.5
17 // CHECK-INST: fmul z0.h, p0/m, z0.h, #0.5
18 // CHECK-ENCODING: [0x00,0x80,0x5a,0x65]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 00 80 5a 65 <unknown>
22 fmul z0.s, p0/m, z0.s, #0.5
23 // CHECK-INST: fmul z0.s, p0/m, z0.s, #0.5
24 // CHECK-ENCODING: [0x00,0x80,0x9a,0x65]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 80 9a 65 <unknown>
28 fmul z0.d, p0/m, z0.d, #0.5
29 // CHECK-INST: fmul z0.d, p0/m, z0.d, #0.5
30 // CHECK-ENCODING: [0x00,0x80,0xda,0x65]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: 00 80 da 65 <unknown>
34 fmul z31.h, p7/m, z31.h, #2.0
35 // CHECK-INST: fmul z31.h, p7/m, z31.h, #2.0
36 // CHECK-ENCODING: [0x3f,0x9c,0x5a,0x65]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 3f 9c 5a 65 <unknown>
40 fmul z31.s, p7/m, z31.s, #2.0
41 // CHECK-INST: fmul z31.s, p7/m, z31.s, #2.0
42 // CHECK-ENCODING: [0x3f,0x9c,0x9a,0x65]
43 // CHECK-ERROR: instruction requires: sve
44 // CHECK-UNKNOWN: 3f 9c 9a 65 <unknown>
46 fmul z31.d, p7/m, z31.d, #2.0
47 // CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
48 // CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
49 // CHECK-ERROR: instruction requires: sve
50 // CHECK-UNKNOWN: 3f 9c da 65 <unknown>
52 fmul z0.h, z0.h, z0.h[0]
53 // CHECK-INST: fmul z0.h, z0.h, z0.h[0]
54 // CHECK-ENCODING: [0x00,0x20,0x20,0x64]
55 // CHECK-ERROR: instruction requires: sve
56 // CHECK-UNKNOWN: 00 20 20 64 <unknown>
58 fmul z0.s, z0.s, z0.s[0]
59 // CHECK-INST: fmul z0.s, z0.s, z0.s[0]
60 // CHECK-ENCODING: [0x00,0x20,0xa0,0x64]
61 // CHECK-ERROR: instruction requires: sve
62 // CHECK-UNKNOWN: 00 20 a0 64 <unknown>
64 fmul z0.d, z0.d, z0.d[0]
65 // CHECK-INST: fmul z0.d, z0.d, z0.d[0]
66 // CHECK-ENCODING: [0x00,0x20,0xe0,0x64]
67 // CHECK-ERROR: instruction requires: sve
68 // CHECK-UNKNOWN: 00 20 e0 64 <unknown>
70 fmul z31.h, z31.h, z7.h[7]
71 // CHECK-INST: fmul z31.h, z31.h, z7.h[7]
72 // CHECK-ENCODING: [0xff,0x23,0x7f,0x64]
73 // CHECK-ERROR: instruction requires: sve
74 // CHECK-UNKNOWN: ff 23 7f 64 <unknown>
76 fmul z31.s, z31.s, z7.s[3]
77 // CHECK-INST: fmul z31.s, z31.s, z7.s[3]
78 // CHECK-ENCODING: [0xff,0x23,0xbf,0x64]
79 // CHECK-ERROR: instruction requires: sve
80 // CHECK-UNKNOWN: ff 23 bf 64 <unknown>
82 fmul z31.d, z31.d, z15.d[1]
83 // CHECK-INST: fmul z31.d, z31.d, z15.d[1]
84 // CHECK-ENCODING: [0xff,0x23,0xff,0x64]
85 // CHECK-ERROR: instruction requires: sve
86 // CHECK-UNKNOWN: ff 23 ff 64 <unknown>
88 fmul z0.h, p7/m, z0.h, z31.h
89 // CHECK-INST: fmul z0.h, p7/m, z0.h, z31.h
90 // CHECK-ENCODING: [0xe0,0x9f,0x42,0x65]
91 // CHECK-ERROR: instruction requires: sve
92 // CHECK-UNKNOWN: e0 9f 42 65 <unknown>
94 fmul z0.s, p7/m, z0.s, z31.s
95 // CHECK-INST: fmul z0.s, p7/m, z0.s, z31.s
96 // CHECK-ENCODING: [0xe0,0x9f,0x82,0x65]
97 // CHECK-ERROR: instruction requires: sve
98 // CHECK-UNKNOWN: e0 9f 82 65 <unknown>
100 fmul z0.d, p7/m, z0.d, z31.d
101 // CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
102 // CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
103 // CHECK-ERROR: instruction requires: sve
104 // CHECK-UNKNOWN: e0 9f c2 65 <unknown>
106 fmul z0.h, z1.h, z31.h
107 // CHECK-INST: fmul z0.h, z1.h, z31.h
108 // CHECK-ENCODING: [0x20,0x08,0x5f,0x65]
109 // CHECK-ERROR: instruction requires: sve
110 // CHECK-UNKNOWN: 20 08 5f 65 <unknown>
112 fmul z0.s, z1.s, z31.s
113 // CHECK-INST: fmul z0.s, z1.s, z31.s
114 // CHECK-ENCODING: [0x20,0x08,0x9f,0x65]
115 // CHECK-ERROR: instruction requires: sve
116 // CHECK-UNKNOWN: 20 08 9f 65 <unknown>
118 fmul z0.d, z1.d, z31.d
119 // CHECK-INST: fmul z0.d, z1.d, z31.d
120 // CHECK-ENCODING: [0x20,0x08,0xdf,0x65]
121 // CHECK-ERROR: instruction requires: sve
122 // CHECK-UNKNOWN: 20 08 df 65 <unknown>
125 // --------------------------------------------------------------------------//
126 // Test compatibility with MOVPRFX instruction.
128 movprfx z31.d, p7/z, z6.d
129 // CHECK-INST: movprfx z31.d, p7/z, z6.d
130 // CHECK-ENCODING: [0xdf,0x3c,0xd0,0x04]
131 // CHECK-ERROR: instruction requires: sve
132 // CHECK-UNKNOWN: df 3c d0 04 <unknown>
134 fmul z31.d, p7/m, z31.d, #2.0
135 // CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
136 // CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
137 // CHECK-ERROR: instruction requires: sve
138 // CHECK-UNKNOWN: 3f 9c da 65 <unknown>
140 movprfx z31, z6
141 // CHECK-INST: movprfx z31, z6
142 // CHECK-ENCODING: [0xdf,0xbc,0x20,0x04]
143 // CHECK-ERROR: instruction requires: sve
144 // CHECK-UNKNOWN: df bc 20 04 <unknown>
146 fmul z31.d, p7/m, z31.d, #2.0
147 // CHECK-INST: fmul z31.d, p7/m, z31.d, #2.0
148 // CHECK-ENCODING: [0x3f,0x9c,0xda,0x65]
149 // CHECK-ERROR: instruction requires: sve
150 // CHECK-UNKNOWN: 3f 9c da 65 <unknown>
152 movprfx z0.d, p7/z, z7.d
153 // CHECK-INST: movprfx z0.d, p7/z, z7.d
154 // CHECK-ENCODING: [0xe0,0x3c,0xd0,0x04]
155 // CHECK-ERROR: instruction requires: sve
156 // CHECK-UNKNOWN: e0 3c d0 04 <unknown>
158 fmul z0.d, p7/m, z0.d, z31.d
159 // CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
160 // CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
161 // CHECK-ERROR: instruction requires: sve
162 // CHECK-UNKNOWN: e0 9f c2 65 <unknown>
164 movprfx z0, z7
165 // CHECK-INST: movprfx z0, z7
166 // CHECK-ENCODING: [0xe0,0xbc,0x20,0x04]
167 // CHECK-ERROR: instruction requires: sve
168 // CHECK-UNKNOWN: e0 bc 20 04 <unknown>
170 fmul z0.d, p7/m, z0.d, z31.d
171 // CHECK-INST: fmul z0.d, p7/m, z0.d, z31.d
172 // CHECK-ENCODING: [0xe0,0x9f,0xc2,0x65]
173 // CHECK-ERROR: instruction requires: sve
174 // CHECK-UNKNOWN: e0 9f c2 65 <unknown>