[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / ld3w.s
blob26f54e1130d1196d6ac894212680dc78d77f2d11
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ld3w { z0.s, z1.s, z2.s }, p0/z, [x0, x0, lsl #2]
11 // CHECK-INST: ld3w { z0.s, z1.s, z2.s }, p0/z, [x0, x0, lsl #2]
12 // CHECK-ENCODING: [0x00,0xc0,0x40,0xa5]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 c0 40 a5 <unknown>
16 ld3w { z5.s, z6.s, z7.s }, p3/z, [x17, x16, lsl #2]
17 // CHECK-INST: ld3w { z5.s, z6.s, z7.s }, p3/z, [x17, x16, lsl #2]
18 // CHECK-ENCODING: [0x25,0xce,0x50,0xa5]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 25 ce 50 a5 <unknown>
22 ld3w { z0.s, z1.s, z2.s }, p0/z, [x0]
23 // CHECK-INST: ld3w { z0.s, z1.s, z2.s }, p0/z, [x0]
24 // CHECK-ENCODING: [0x00,0xe0,0x40,0xa5]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 e0 40 a5 <unknown>
28 ld3w { z23.s, z24.s, z25.s }, p3/z, [x13, #-24, mul vl]
29 // CHECK-INST: ld3w { z23.s, z24.s, z25.s }, p3/z, [x13, #-24, mul vl]
30 // CHECK-ENCODING: [0xb7,0xed,0x48,0xa5]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: b7 ed 48 a5 <unknown>
34 ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
35 // CHECK-INST: ld3w { z21.s, z22.s, z23.s }, p5/z, [x10, #15, mul vl]
36 // CHECK-ENCODING: [0x55,0xf5,0x45,0xa5]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 55 f5 45 a5 <unknown>