[ARM] Better OR's for MVE compares
[llvm-core.git] / test / MC / AArch64 / SVE / ld4h.s
blobf4ec9dd5ed2ad2d797d696012ff8b3c544dd2fc3
1 // RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve < %s \
2 // RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
3 // RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
4 // RUN: | FileCheck %s --check-prefix=CHECK-ERROR
5 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
6 // RUN: | llvm-objdump -d -mattr=+sve - | FileCheck %s --check-prefix=CHECK-INST
7 // RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve < %s \
8 // RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
10 ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
11 // CHECK-INST: ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0, x0, lsl #1]
12 // CHECK-ENCODING: [0x00,0xc0,0xe0,0xa4]
13 // CHECK-ERROR: instruction requires: sve
14 // CHECK-UNKNOWN: 00 c0 e0 a4 <unknown>
16 ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
17 // CHECK-INST: ld4h { z5.h, z6.h, z7.h, z8.h }, p3/z, [x17, x16, lsl #1]
18 // CHECK-ENCODING: [0x25,0xce,0xf0,0xa4]
19 // CHECK-ERROR: instruction requires: sve
20 // CHECK-UNKNOWN: 25 ce f0 a4 <unknown>
22 ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
23 // CHECK-INST: ld4h { z0.h, z1.h, z2.h, z3.h }, p0/z, [x0]
24 // CHECK-ENCODING: [0x00,0xe0,0xe0,0xa4]
25 // CHECK-ERROR: instruction requires: sve
26 // CHECK-UNKNOWN: 00 e0 e0 a4 <unknown>
28 ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
29 // CHECK-INST: ld4h { z23.h, z24.h, z25.h, z26.h }, p3/z, [x13, #-32, mul vl]
30 // CHECK-ENCODING: [0xb7,0xed,0xe8,0xa4]
31 // CHECK-ERROR: instruction requires: sve
32 // CHECK-UNKNOWN: b7 ed e8 a4 <unknown>
34 ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
35 // CHECK-INST: ld4h { z21.h, z22.h, z23.h, z24.h }, p5/z, [x10, #20, mul vl]
36 // CHECK-ENCODING: [0x55,0xf5,0xe5,0xa4]
37 // CHECK-ERROR: instruction requires: sve
38 // CHECK-UNKNOWN: 55 f5 e5 a4 <unknown>