1 // RUN
: not llvm-mc
-triple
=aarch64
-show-encoding
-mattr
=+sve2
2>&1 < %s| FileCheck
%s
4 // ------------------------------------------------------------------------- //
5 // z register out of range for index
7 smlalt z0.s
, z1.h
, z8.h
[0]
8 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
9 // CHECK-NEXT
: smlalt z0.s
, z1.h
, z8.h
[0]
10 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
12 smlalt z0.d
, z1.s
, z16.s
[0]
13 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid operand for instruction
14 // CHECK-NEXT
: smlalt z0.d
, z1.s
, z16.s
[0]
15 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
17 // ------------------------------------------------------------------------- //
18 // Index out of bounds
20 smlalt z0.s
, z1.h
, z7.h
[-1]
21 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: vector lane must
be an integer in range
[0, 7].
22 // CHECK-NEXT
: smlalt z0.s
, z1.h
, z7.h
[-1]
23 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
25 smlalt z0.s
, z1.h
, z7.h
[8]
26 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: vector lane must
be an integer in range
[0, 7].
27 // CHECK-NEXT
: smlalt z0.s
, z1.h
, z7.h
[8]
28 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
30 smlalt z0.d
, z1.s
, z15.s
[-1]
31 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: vector lane must
be an integer in range
[0, 3].
32 // CHECK-NEXT
: smlalt z0.d
, z1.s
, z15.s
[-1]
33 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
35 smlalt z0.d
, z1.s
, z15.s
[4]
36 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: vector lane must
be an integer in range
[0, 3].
37 // CHECK-NEXT
: smlalt z0.d
, z1.s
, z15.s
[4]
38 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
40 // ------------------------------------------------------------------------- //
41 // Invalid element width
43 smlalt z0.
b, z1.
b, z2.
b
44 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
45 // CHECK-NEXT
: smlalt z0.
b, z1.
b, z2.
b
46 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
48 smlalt z0.h
, z1.h
, z2.h
49 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
50 // CHECK-NEXT
: smlalt z0.h
, z1.h
, z2.h
51 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
53 smlalt z0.s
, z1.s
, z2.s
54 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
55 // CHECK-NEXT
: smlalt z0.s
, z1.s
, z2.s
56 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
58 smlalt z0.d
, z1.d
, z2.d
59 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
60 // CHECK-NEXT
: smlalt z0.d
, z1.d
, z2.d
61 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
63 smlalt z0.
b, z1.
b, z2.
b[0]
64 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
65 // CHECK-NEXT
: smlalt z0.
b, z1.
b, z2.
b[0]
66 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
68 smlalt z0.h
, z1.h
, z2.h
[0]
69 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
70 // CHECK-NEXT
: smlalt z0.h
, z1.h
, z2.h
[0]
71 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
73 smlalt z0.s
, z1.
b, z2.
b[0]
74 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
75 // CHECK-NEXT
: smlalt z0.s
, z1.
b, z2.
b[0]
76 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
78 smlalt z0.s
, z1.s
, z2.s
[0]
79 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
80 // CHECK-NEXT
: smlalt z0.s
, z1.s
, z2.s
[0]
81 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
83 smlalt z0.s
, z1.d
, z2.d
[0]
84 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
85 // CHECK-NEXT
: smlalt z0.s
, z1.d
, z2.d
[0]
86 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
88 smlalt z0.d
, z1.
b, z2.
b[0]
89 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
90 // CHECK-NEXT
: smlalt z0.d
, z1.
b, z2.
b[0]
91 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
93 smlalt z0.d
, z1.h
, z2.h
[0]
94 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
95 // CHECK-NEXT
: smlalt z0.d
, z1.h
, z2.h
[0]
96 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
98 smlalt z0.d
, z1.d
, z2.d
[0]
99 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: invalid element width
100 // CHECK-NEXT
: smlalt z0.d
, z1.d
, z2.d
[0]
101 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
103 // --------------------------------------------------------------------------//
104 // Negative tests for instructions that are incompatible with movprfx
106 movprfx z0.d
, p0
/z
, z7.d
107 smlalt z0.d
, z1.s
, z31.s
108 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: instruction is unpredictable when following
a predicated movprfx
, suggest using unpredicated movprfx
109 // CHECK-NEXT
: smlalt z0.d
, z1.s
, z31.s
110 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}:
112 movprfx z0.d
, p0
/z
, z7.d
113 smlalt z0.d
, z1.s
, z15.s
[0]
114 // CHECK
: [[@LINE-
1]]:{{[0-9]+}}: error
: instruction is unpredictable when following
a predicated movprfx
, suggest using unpredicated movprfx
115 // CHECK-NEXT
: smlalt z0.d
, z1.s
, z15.s
[0]
116 // CHECK-
NOT: [[@LINE-
1]]:{{[0-9]+}}: